About the Role We are seeking a Director of ASIC Verification who leads from the front: you'll own verification strategy, sign-off, and the team — and you'll also be one of the strongest hands-on verification engineers h…
Who We Are Applied Materials is the global leader in materials science and engineering solutions that are at the foundation of virtually every new semiconductor chip and advanced display in the world. The equipment that …
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DDN is seeking a Staff Engineer to join our Infinia Core team. This is a hands-on technical role combining deep distributed-systems engineering with direct engagement with customers running Infinia in production. You'll …
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology …
Skills: Advantest 93K, Teradyne UltraFLEX, ATE testing, Test methodology, Silicon process
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Job Details: Job Description: About Intel & Silicon Chassis Intel is seeking an Entry Level Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to the verification of next-generat…
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NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping i…
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Johnson & Johnson MedTech
Manufacturing Technician II
Santa Clara, California, United States · On-site
$47k–$77k/yr
Mid level
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Who We Are Applied Materials is the global leader in materials science and engineering solutions that are at the foundation of virtually every new semiconductor chip and advanced display in the world. The equipment that …
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Skills: ATE testing, Advantest 93K, Teradyne UltraFLEX, Test program development, C++
Postdoctoral Fellow – Next-Gen Sequencing Systems, Research & Early Development
Santa Clara, California, United States · On-site
$100k–$106k/yr
Entry level
At Roche you can show up as yourself, embraced for the unique qualities you bring. Our culture encourages personal expression, open dialogue, and genuine connections, where you are valued, accepted and respected for who …
The Director of ASIC Verification will own the end-to-end verification strategy, methodology, and tape-out sign-off for silicon and IP subsystems. They will also lead, recruit, and mentor a high-performing verification team while remaining hands-on with complex debugging and testbench development.
Requirements
Candidates must have at least 8 years of ASIC/SOC verification experience, including 5 years in a leadership role and multiple successful tapeouts. A degree in Electrical or Computer Engineering is required, with preference given to those with experience in AI/datacenter hardware and early-stage startup environments.
Full job description
About the Role
We are seeking a Director of ASIC Verification who leads from the front: you'll own verification strategy, sign-off, and the team — and you'll also be one of the strongest hands-on verification engineers here, writing testbenches, closing coverage, and debugging the hardest failures.
This role will be performed onsite from our office in Santa Clara, CA.
Essential Duties & Responsibilities
Own verification end-to-end: strategy, methodology (UVM, formal, emulation, coverage-driven closure), tape-out sign-off for Netpreme silicon, IP, subsystems and post silicon bringup support including test-vector generation.
Architect and author verification environments and testplans, review testbench code line-by-line, and personally drive debug of the hardest protocol, coverage, and bring-up issues
Recruit, lead, and develop a world-class verification organization that treats technical depth as the currency
Present verification readiness, metrics, and risk posture to engineering leadership with conviction
Qualifications
BS/MS in Electrical Engineering, Computer Engineering, or related field.
8+ years of progressive ASIC/SOC verification, with 5+ years leading verification teams
Demonstrable experience writing verification code, building testbenches, and closing coverage
Multiple tapeouts in advanced process nodes where you owned both deep technical work and sign-off
Hands-on experience with high-speed protocol IP — Ethernet, UCIe, UALink, or comparable
Fluent across the full ASIC/SOC lifecycle — microarchitecture through tape-out — on designs integrating interconnect, I/O, and memory subsystems
Executive communication skills; proven ability to manage risk, escalations, budget, and headcount on startup timelines
Preferred Qualifications
PhD in EE, CE, or related field
Built a verification team from zero at an early-stage startup while delivering milestones personally
Hands-on post-silicon bring-up, debug, and validation leadership
AI/datacenter accelerator background; familiarity with LLM memory/dataloader bottlenecks
Knowledge of DFT and its interaction with front-end verification
Compensation & Benefits
Competitive salary with performance-based bonus and early-stage equity grant
100% employer-paid Health, Dental, and Vision coverage for you and your dependents
401(k) match with immediate vesting, and access to financial advisors to help you reach your financial goals
100% employer-paid Life, Disability, and AD&D insurance, plus a fitness stipend and wellness & mental health perks
Generous PTO: 20 vacation days, 15 company holidays (including 3 floating days of your choosing)
Daily lunch stipend
Enterprise-level Claude & ChatGPT access with a generous token budget
Well-equipped, sunny offices in Santa Clara, CA & Cambridge, MA with on-site parking and EV charging; on-site fitness center in Santa Clara; gym discounts near our Cambridge office
Visa sponsorship and relocation assistance to one of our office hubs
A collaborative, continuous-learning environment with smart, dedicated colleagues building the next generation of high-performance computing architecture
The Opportunity
Impact: Humanity stands at the dawn of a new industrial revolution driven by AI—one with the potential to redefine how we live on this planet. We are tackling a fundamental challenge at the infrastructure layer: unlocking greater AI capability while dramatically improving efficiency. The work we do here compounds across state-of-the-art AI models, systems, and real-world applications.
Timing: Breakthrough technology matters most when it meets the right time. Joining now means real ownership of the company and meaningful influence over product direction and execution. In this early-stage environment, your ideas shape the trajectory of the technology—not just its implementation. You’ll work from first principles, move quickly from insight to execution, and see your contributions directly reflected in what we build.
Culture: You’ll work alongside a group of people who care deeply about rigor, clarity, and impact. We value thoughtful disagreement, fast learning, and intellectual fearlessness. This is a place where strong ideas shine, curiosity is encouraged, and growth is a daily practice—not a future promise.
How much do Technology jobs in Santa Clara, CA pay?
Based on 2734 listings with disclosed salaries, most technology jobs in Santa Clara, CA pay between $116k–$288k per year. Individual offers vary with seniority, company size, and specialization.
How many Technology jobs are open in Santa Clara, CA right now?
There are currently 2,954 open technology positions in Santa Clara, CA listed on Clera. New openings are added daily as companies post roles.
Which companies are hiring for Technology roles in Santa Clara, CA?
Companies currently hiring include Applied Materials, NVIDIA, ServiceNow, AMD, Qualcomm, among others. Browse the listings above to see every active employer.
Are there remote or hybrid Technology jobs in Santa Clara, CA?
Yes — 587 of the 2954 open technology positions offer remote or hybrid work (130 remote, 457 hybrid).
How do I apply for Technology jobs in Santa Clara, CA?
Each listing links directly to the employer's application page. Apply early — fresh listings get the most recruiter attention in the first two weeks.