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Mountain View, California, United States · On-site
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Mountain View, California, United States · Hybrid
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Mountain View, California, United States · Hybrid
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Mountain View, California, United States · On-site
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Mountain View, California, United States · On-site
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Mountain View, California, United States · Hybrid
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About Tapestry Tapestry is a group within Google working to build the AI-powered electric grid. We are tackling one of the world’s most important infrastructure challenges: helping the energy system become more visible, …
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NuroMountain View, California, United States · On-site
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Mountain View, California, United States · On-site
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Mountain View, California, United States · On-site
$143k–$243k/yr
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Skills: Fullstack development, ReactJS, Web UI frameworks, AI agent development, Generative AI
Mountain View, California, United States · On-site
$155k–$260k/yr
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Skills: Java, Go, C++, Distributed systems, System design
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Lead end-to-end execution of silicon hardware development programs from concept through production across cross-functional teams. Define operational processes, manage technical risks, and drive tapeout readiness while acting as a liaison between engineering teams and leadership.
Requires 15+ years of experience in chip/IC development with at least 3 years in a technical program management role. Candidates must possess technical fluency in SoC or chiplet design flows and the ability to manage complex cross-functional dependencies.
MatX is on a mission to be the compute platform for Artificial General Intelligence. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the largest Machine Learning workloads for Artificial General Intelligence.
MatX is seeking a Technical Program Manager to join our Silicon/Hardware team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for this role will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies.
You will own the cross-functional execution framework for advanced Silicon HW programs, from early planning through tapeout. You will drive milestones, dependencies, execution reviews, decision-making forums, risk management, and tapeout readiness across multiple engineering teams.
Lead end-to-end execution of Silicon HW development programs, from concept through production, driving planning and implementation across cross-functional teams.
Partner tightly with Architecture, RTL Design, and Design Verification (DV) teams to identify bottlenecks, track coverage metrics, and mitigate risks before they impact the tapeout schedule.
Define the core operational processes and modes of work for the HW group, building and refining the stage-gate reviews required to transition smoothly from architecture into implementation and verification.
Develop playbooks and best practices for program management across the Silicon HW organization for cross-functional deliveries.
Support silicon planning across performance, power, area, cost, reliability, and manufacturability tradeoffs.
Track technical dependencies, schedule risks, owners, closure dates, critical path, program milestones, tapeout readiness, silicon bring-up deliverables, and escalation paths.
Manage technical risks related to schedule, design maturity, IP readiness, verification closure, physical signoff, package/test readiness, and supply chain.
Act as a liaison between hardware teams and company leadership, providing clear, timely updates and insights.
15+ years of experience in chip/IC development as an engineer, engineering manager, or technical program manager, with at least 3 years in a technical program manager role.
Experience leading Silicon HW programs through multiple phases of the silicon lifecycle, with end-to-end chip execution from concept to silicon.
Experience driving complex cross-functional programs with multiple engineering teams, technical dependencies, external vendors, and tight schedules.
Technical fluency in SoC or chiplet design flows — enough to understand RTL milestones, DV signoff, Silicon HW handoffs, and silicon bring-up phases without needing translation.
Strong technical judgment with the ability to manage tradeoffs across performance, power, area, cost, schedule, quality, and risk.
Ability to drive schedules, dependency management, issue tracking, risk management, milestone governance, and executive-level communication.
Experience coordinating design reviews and driving closure across cross-functional engineering teams.
Strong written and verbal communication skills, including the ability to summarize technical risks, tradeoffs, decisions, and schedule impact.
Proficiency with program-management and engineering collaboration tools such as Jira, GitHub, Confluence, Smartsheet, MS Project, Google Workspace, or equivalent.
Experience with AI infrastructure, datacenter racks, networking systems, storage systems, or high-power server platforms.
Experience coordinating programs involving high-speed interconnects, liquid-cooled systems, telemetry, diagnostics, or rack-scale validation.
Prior hands-on engineering experience in BE PD.
The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation.
Early Career - $160,000 - $275,000 + equity
Mid Career - $175,000 - $400,000 + equity
Senior Career - $250,000 - $600,000 + equity
Time off: 4 weeks PTO (accrued) + 12 company Holidays + up to 3 weeks remote work
Health: Company-subsidized Medical (Kaiser or Anthem) for employees & dependents, Guardian Dental and Vision insurances for employee & dependents, and life insurance (employee only), plus HSA and FSA offerings via Lively.
Financial Wellbeing: Choose from Roth IRA/ 401K (or both) retirement plans with up to 5% company contribution to 401K (even if you don't contribute). Also, 100% company-paid life insurance (up to $300K) and long-term disability insurances.
Professional Development: $1500 Professional Development Budget (per year)
Team Meals: MatX provides onsite team lunch & dinner Monday - Friday, with your choice of ordering via WeBox, Specialty’s or via our reimbursement system
Commute on Us: Commute on our company Uber account, or reimburse your train rides. Either way, we pay 100% for your daily commute.
MatX E[x]tras: $50/mo to use on the perk you value most
Cell & Internet Reimbursement: $35/mo for cellular and $40/mo for wifi
Mental Wellbeing: 100% paid mental health benefit via SpringHealth and Guardian EAP.
Support to Parents: Up to 12 weeks paid parental leave regardless of path to parenthood, 10 weeks pregnancy disability leave, flexible return-to-work hours, and Benepass reproductive health & parental benefit.
AI Resources: Up to $20K/month plus a dedicated internal AI Tooling Team to support your productivity
As part of our dedication to the diversity of our team and our focus on creating an inviting and inclusive work experience, MatX is committed to a policy of Equal Employment Opportunity and will not discriminate against an applicant or employee on the basis of race, color, religion, creed, national origin or ancestry, sex, gender, gender identity, gender expression, sexual orientation, age, physical or mental disability, medical condition, marital/domestic partner status, military and veteran status, genetic information or any other legally recognized protected basis under federal, state or local laws, regulations or ordinances.
All candidates must be authorized to work in the United States and work from our offices in Mountain View Tuesdays-Thursdays.
This position requires access to information that is subject to U.S. export controls. This offer of employment is contingent upon the applicant's capacity to perform job functions in compliance with U.S. export control laws without obtaining a license from U.S. export control authorities.
MatX does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to our hiring managers or People team and any resumes submitted are deemed to be the property of MatX.
Making AI better, faster, and cheaper with more powerful hardware.
MatX designs hardware tailored for the world’s best AI models: We dedicate every transistor to maximizing performance for large models. For these models, we deliver 10× more computing power, enabling AI labs to make models an order of magnitude smarter and more useful. Our hardware would make it possible to train GPT-4 and run ChatGPT, but on the budget of a small startup. A world with more widely available intelligence is a happier and more prosperous world—picture people of all socioeconomic levels having access to an AI staff of specialist MDs, tutors, coaches, advisors, and assistants.
Offices: Mountain View, CA, US
