Cspeed IO is a stealth start up backed by Sutter Hill Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semicondu…
Cspeed IO is a stealth start up backed by Sutter Hill Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semicondu…
Cspeed IO is a stealth start up backed by Sutter Hill Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semicondu…
Executive Director Machine Learning Engineer-MLOps
Palo Alto, California, United States · On-site
$223k–$325k/yr
Senior+$1.6B raised
We are looking for a Senior MLOps engineer to work closely with Data Scientists to build and deploy ML models on a modern MLOps stack. As an Executive Director Machine Learning Engineer on the Recommendation Engine team,…
About the Role You'll be an early engineer reporting directly to the CTO. You'll own the compute layer: the GPU clusters and the inference systems that run on them. You'll make the architectural decisions that define the…
Skills: Kubernetes, GPU Infrastructure, AWS, GCP, Inference Systems
About Rivian Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract. As a company, we con…
About Nu Nu is the leading digital bank in Latin America, serving 135 million customers across Brazil, Mexico, and Colombia. The company has been leading an industry transformation by leveraging data and proprietary tech…
About ALSO. We’re ALSO, an electric mobility company originally conceived as a part of Rivian. We’re a passionate team of builders, dreamers, doers and innovators, focused on creating entirely new (not to mention, innova…
Skills: Technical writing, Hardware documentation, Software documentation, Information architecture, XML
A World-Changing Company Palantir builds the world’s leading software for data-driven decisions and operations. By bringing the right data to the people who need it, our platforms empower our partners to develop lifesavi…
This role is on-site in our San Francisco office (Atherton near Palo Alto) or hybrid in our New York City office. The Role You'll deliver our AI platform the world's leading semiconductor and consumer electronics compani…
Skills: Backend Engineering, Full-stack Development, Infrastructure, DevOps, Agent Development
This role is on-site in our San Francisco office (Atherton near Palo Alto) or hybrid in our New York City office. The Role You'll deliver our AI platform the world's leading semiconductor and consumer electronics compani…
Skills: Backend Engineering, Full-stack Development, Infrastructure, DevOps, Agent Development
This role is on-site in our San Francisco office (Atherton near Palo Alto) or hybrid in our New York City office. The Role You'll deliver our AI platform the world's leading semiconductor and consumer electronics compani…
Skills: Backend Engineering, Full-stack Development, Infrastructure, DevOps, Agent Development
This role is on-site in our San Francisco office (Atherton near Palo Alto) or hybrid in our New York City office. The Role You'll deliver our AI platform the world's leading semiconductor and consumer electronics compani…
Skills: Backend Engineering, Full-stack Development, Infrastructure, DevOps, Agent Development
About Us Rivian and Volkswagen Group Technologies is a joint venture between two industry leaders with a clear vision for automotive’s next chapter. From operating systems to zonal controllers to cloud and connectivity s…
Meteorological Scientist - Data Assimilation and NWP
Palo Alto, California, United States · On-site
$110k–$150k/yr
Mid level$26M raised
WindBorne Systems Meteorological Scientist - Data Assimilation and NWP WindBorne Systems is supercharging weather forecasts with a unique proprietary data source: the largest balloon constellation in the world. WindBorne…
Member of Technical Staff - Applied AI Engineering [Bay Area]
Palo Alto, California, United States · Hybrid
$300k–$400k/yr
Senior+
Member of Technical Staff – Applied AI Engineering Location: San Francisco Bay Area | Hybrid Role Description AIVista turns foundation models into specialized, governed agents that run mission-critical, regulated enterpr…
About Mistral Mistral provides full-stack AI solutions: from frontier models to developer tools, applications, and compute. We partner with enterprises tackling the hardest problems—across high-stakes industries like fin…
Skills: Systems Engineering, Distributed Systems, Cloud Infrastructure, MLOps, Kubernetes
Volta
Team Lead, Platform Engineering (2x Openings)
Palo Alto, California, United States · Hybrid
$250k–$340k/yr
Senior
About Volta Volta is the category-defining, fully vertically integrated AI infrastructure platform – from capital to clusters to software, under a founder-led enterprise. Our mission is The Utility of Compute™: AI infras…
Skills: Platform engineering, Team leadership, Kubernetes, Python, Go
Discovery Loop
Member of Technical Staff
Palo Alto, California, United States · On-site
Mid level
We're building systems that automate entire experimental loops, closing the gap between hypothesis and discovery in machine learning, science, and engineering. The faster we can move through that loop, the faster real br…
Skills: Machine Learning, Artificial Intelligence, Software Engineering, Data Engineering, Infrastructure
Aptos is a people-first blockchain on a mission to help billions of people achieve universal and fair access to decentralized assets in a safe and scalable way. Founded by some of the original creators and maintainers th…
Skills: Payment infrastructure, Blockchain, API development, Rust, Move
Sign up with Clera and we'll reach out the moment a role actually fits you — no more spraying applications into the void.
Full-time
postgraduate degree
Posted 38d ago
~40 hrs/week
Responsibilities
Perform finite element analysis for optical engine packages across thermal and structural domains to support architecture and qualification decisions. Lead correlation efforts against measured hardware data to ensure model accuracy and design sign-off.
Requirements
Requires an MS or PhD in Mechanical Engineering, Materials Science, or Engineering Mechanics with 6+ years of experience in semiconductor packaging FEA. Must demonstrate expert proficiency in commercial FEA/CFD tools and experience with advanced packaging technologies.
Full job description
Cspeed IO is a stealth start up backed by Sutter Hill Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semiconductor and infrastructure businesses at companies like Broadcom, Lumentum, Tesla, Apple, Samsung, Intel, and VMware.
Cspeed IO is developing next-generation optical semiconductor solutions for the AI infrastructure market, focused on enabling true “scale-up” architectures. Our mission is to replace traditional copper interconnects with advanced fiber-optic technologies that overcome the limitations of existing optics solutions and architectures.
The Role
This position performs finite element analysis for CspeedIO optical engine packages across both thermal and structural domains. It is scoped for a strong FEA engineer: demonstrated depth in either thermal or mechanical analysis is expected, and the ability to work competently in the other is required.
The analysis supports package architecture decisions and qualification. Temperature governs optical wavelength and channel uniformity. Deformation and interconnect stress govern assembly yield, reliability, and optical coupling, since warpage displaces optical facets. Both sets of results terminate in the same design decisions, which is why the scope is held in one role.
Correlation against measured hardware is a standing expectation. Results are used for design sign-off, so assumptions must be documented and defensible.
Responsibilities
Thermal analysis
Build and maintain thermal models spanning die, package, interface materials, lid, and cold plate, and establish cooling boundary conditions and their validity limits.
Resolve the temperature field across the photonic IC to the resolution photonic design requires, and define the heat extraction path and interface material selection for high-flux die within the assembly.
Structural analysis
Predict warpage through the assembly process, and own the flatness, coplanarity, and facet planarity budgets that assembly and optical coupling depend on.
Analyze bump and interconnect stress, chip-package interaction, and fatigue life, supporting qualification against JEDEC or equivalent methodology.
Methodology and correlation
Define modeling standards and document assumptions such that results are auditable.
Lead correlation against measured temperature, warpage, cross-section, and reliability data, and revise methodology accordingly.
Design and supplier support
Provide requirements, constraints, and sign-off criteria during architecture definition rather than after design freeze.
Engage substrate suppliers, OSATs, and cooling and material vendors on process assumptions and measured data.
Required Qualifications
MS or PhD in Mechanical Engineering, Materials Science, Engineering Mechanics, or equivalent practical background.
6+ years of finite element analysis for semiconductor packaging or electronic systems, including one product carried from architecture through hardware correlation.
Expert proficiency in one commercial FEA or CFD tool and working proficiency in a second covering the other domain — for example Ansys Mechanical or Abaqus alongside Icepak, Fluent, Flotherm, or Celsius.
Sound FEA fundamentals: meshing judgment, boundary condition selection, convergence, and the ability to defend a model rather than only to run one.
Demonstrated correlation of simulation against physical measurement, and the judgment to distinguish a modeling error from a process excursion.
Experience with advanced packaging construction: flip chip, 2.5D/3D, interposers, and heterogeneous integration.
Preferred Qualifications
Depth in nonlinear and time-dependent material behavior: creep, viscoplasticity, viscoelasticity, and fatigue.
Silicon photonics or optoelectronic packaging, including thermo-optic sensitivity or warpage as an optical alignment constraint.
Coupled thermal-structural workflows, including transfer of a computed temperature field into a structural model.
Direct-to-chip liquid cooling, or chip-package interaction and low-k dielectric stress.
Scripting for model automation and parametric studies, and design of experiments methodology.
Scope and Impact
This position provides the physics basis for package architecture decisions and qualification.
How much do Engineering jobs in Palo Alto, CA pay?
Based on 734 listings with disclosed salaries, most engineering jobs in Palo Alto, CA pay between $100k–$261k per year. Individual offers vary with seniority, company size, and specialization.
How many Engineering jobs are open in Palo Alto, CA right now?
There are currently 915 open engineering positions in Palo Alto, CA listed on Clera. New openings are added daily as companies post roles.
Which companies are hiring for Engineering roles in Palo Alto, CA?
Companies currently hiring include Rivian, Ford Motor Company, SpaceX, Rivian and Volkswagen Group Technologies, Amazon, among others. Browse the listings above to see every active employer.
Are there remote or hybrid Engineering jobs in Palo Alto, CA?
Yes — 386 of the 915 open engineering positions offer remote or hybrid work (56 remote, 330 hybrid).
How do I apply for Engineering jobs in Palo Alto, CA?
Each listing links directly to the employer's application page. Apply early — fresh listings get the most recruiter attention in the first two weeks.