Engineering Jobs in Santa Clara, CA (Now Hiring) — 1,984 open — Page 79

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

The DTECH team is part of the Global SOC organization and is responsible for STA methodology and signoff, foundry technology enablement and analysis, design automation and internal and external EDA tools, design analysis and optimization tools and platforms, low power architecture, methodology, and IP, and foundation IP development.  

About the Role

As a member of the DTECH Methodology team, you will work closely with core and SOC teams to enable a state-of-the-art design analytics platform. Your work will have a consequential impact on the power, performance, area, and quality of Qualcomm’s products.

Required for this Role:

• M.S/Ph.D. degree in Electrical Engineering or Computer Science with 1-2 years of relevant experience with ASIC/VLSI design tools and flows
• Strong programming skills in Python
• Hands-on experience with static timing analysis (STA) tools, e.g., PrimeTime and Tempus
• Problem-solving and analytical mindset

Preferred Qualifications:

• Critical thinking with good software architecture understanding to develop platforms at scale
• Familiarity with GenAI models (e.g., LLMs such as GPT, Liama, etc.) and their application in real-world solutions, such as chatbots, etc.
• Experience designing and developing agentic AI systems
• Experience with version control tools like Perforce or Git
• Experience with place & route tools and a good understanding of the ASIC RTL-GDSII design flow

Where you will be working - this role requires the candidate to be onsite in San Diego or Santa Clara, CA.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

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EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$153,200.00 - $229,800.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm.  We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).  In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.