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Full-time
bachelor degree, postgraduate degree
Posted 48d ago
~40 hrs/week
Responsibilities
The role involves owning the architecture and implementation of major analog sub-components like receiver AFEs and clocking networks. You will collaborate with DSP and system architects to ensure seamless communication between analog and digital systems.
Requirements
Requires a Bachelor's degree in Electrical Engineering or a related field with at least 8 years of experience in Analog/Mixed-Signal design. Preferred candidates hold a Master's or PhD and have experience with high-speed link design and tape-outs.
Full job description
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
8 years of experience in Analog/Mixed-Signal design.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related technical field.
Experience leading a block or sub-system tape-out for high-speed I/Os.
Experience demonstrating innovation in high-speed link design through patents or product releases.
Experience with package and PCB co-design and their impact on signal integrity.
Experience in system-level modeling and simulation using tools like Matlab or Python.
Knowledge of noise analysis, jitter decomposition, and adaptive loops.
About the job:
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Staff Analog Design Engineer, you will design and integrate analog sub-systems. You will be responsible for ensuring the Analog Front-End (AFE) communicates flawlessly with the Digital Signal Processor (DSP), the package and silicon are a single electrical entity. Your work will bridge the analog and digital worlds to enable industry-leading performance.
The ML, Systems, and Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities:
Own the architecture and implementation of a major sub-component, such as the entire receiver AFE or the clocking/Phase-Locked Loop (PLL) distribution network.
Design the critical "suspension system" (e.g., Equalization/CTLE, ADC) that allows the digital core to function perfectly despite a noisy, high-loss channel.
Lead the definition and design of test chips to verify out novel topologies and circuit techniques in next-generation Gate-All-Around (GAA) nodes.
Collaborate with DSP, firmware, and system architects to define hardware/software partitioning and interface specifications.
Provide technical guidance and mentorship to engineers on the team.
Related keywords
Analog DesignMixed-SignalHigh-Speed I/OSignal IntegrityMatlabPythonNoise AnalysisJitter DecompositionAdaptive LoopsAFEDSPPLLEqualizationCTLEADCGAA Nodes
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