Mountain View, California, United States · On-site
$200k–$320k/yr
SeniorVisa sponsorship
About the role We're looking for a experienced Design Verification engineer with at least 5 years of pre-silicon verification experience in end to end verification for complex IP, subsystems, and/or SoC system level veri…
Skills: SystemVerilog, UVM, Synopsys VCS, Cadence Xcelium, Synopsys Verdi
Mountain View, California, United States · On-site
$300k–$350k/yr
SeniorVisa sponsorship
About the Role We are seeking an experienced Design-for-Test (DFT) Engineer to join our silicon engineering team and help stand up the DFT function alongside the architecture and physical-design (PD) teams. This is a gro…
Mountain View, California, United States · On-site
$200k–$360k/yr
SeniorVisa sponsorship
About the role Own MLIR dialect design and lowering passes for our AI accelerator — defining the high-level tensor IR, async / streaming semantics, and sharded-tensor types that bridge ML frameworks to silicon. Work with…
Mountain View, California, United States · On-site
$180k–$320k/yr
SeniorVisa sponsorship
About the role Own LLVM backend development for our custom accelerator ISA — instruction selection, register allocation, scheduling, and linker support across scalar, vector, and floating-point pipelines. Work with chip-…
Mountain View, California, United States · On-site
$180k–$320k/yr
SeniorVisa sponsorship
About the role Own verification of our AI compute core - tensor pipelines, MAC arrays, accumulator logic, and the compute ↔ memory interconnect. Work with chip-design and software teams driving DensityAI's AI accelerator…
Mountain View, California, United States · On-site
$200k–$350k/yr
Senior+Visa sponsorship
About the role Own different aspects of Packaging including Design Layout, SI/PI and Thermo-mechanical aspects. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon throu…
Mountain View, California, United States · On-site
$130k–$165k/yr
Mid level
About the role We're hiring a Technical Sourcer to fuel our most critical hiring needs across hardware, silicon, and AI engineering. You'll partner directly with recruiters and hiring managers to build pipelines of excep…
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$200k–$320k/yr
Full-time
Equity grant, Medical insurance, Dental insurance, Vision insurance, 401(k), Paid time off
Visa sponsorship available
Posted 27d ago
~40 hrs/week
Responsibilities
The engineer will own the functional verification of a custom AI accelerator's digital logic by building UVM environments and writing testbenches. Responsibilities include debugging RTL mismatches, driving coverage closure, and establishing regression infrastructure to ensure design correctness before tape-out.
Requirements
Candidates must have expert-level proficiency in SystemVerilog and experience building or extending UVM environments. Proficiency with industry-standard simulators like VCS or Xcelium and waveform viewers like Verdi is required.
Full job description
About the role
We're looking for a experienced Design Verification engineer with at least 5 years of pre-silicon verification experience in end to end verification for complex IP, subsystems, and/or SoC system level verification from plan to functional closure. This is a senior individual-contributor role and you'll partner closely with our HW-design and software teams, driving DensityAI's AI accelerator program from first silicon through scale-out
What you'll do
Own an entire testing domain based on your expertise
Develop end to end testing strategy from IP to SOC-level and to emulation for our AI accelerator silicon
Use and develop AI-assisted tool flows to accelerate verification and emulation timeline
What we're looking for
5+ years of experience in one or more of the following:
Block Level/Sub System Verification
CPU Subsystem/IP integration
SoC/full-chip Verification
Emulation testing
DMA/NoC Verification
Multi-SoC/Die to Die protocol verification
Debug for functional closure of complex design or SOCs
Proven records on end-to-end pre-silicon verification ownership and deliverables
Strong Interest in optimizing Verification techniques and life cycle using the latest agentic/AI assisted flows
Exceptional abilities in analyzing and understanding specification from both hardware and software perspectives
Well-versed in UVM methodology and testbench architecture
Ability to define clear goals and milestones to meet aggressive timelines and quickly adapt to a dynamic design life cycle
Self driven and passionate, with a strong sense of respectful team collaboration
Flexible Mindset to jump in and contribute to multiple domains within verification as needed
(Optional) RISC-V, formal verification, emulation platforms (Palladium, Veloce, or equivalent), or post-silicon bring-up
Compensation
Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa Sponsorship
DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
Export Controls
Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Equal Opportunity
DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.
Full compensation packages are based on candidate experience and relevant certifications.
California pay range
$200,000—$320,000 USD
Related keywords
AI AcceleratorDigital LogicSystemVerilogUVMSynopsys VCSCadence XceliumSynopsys VerdiFunctional CoverageSVAAPBAXISPIJTAGLLVMRISC-VRTL
Building the fastest inference solution for frontier models
Industry
Technology, Information and Internet
Company size
11-50 employees
Headquarters
Mountain View, CA
LinkedIn followers
2,633
DensityAI is building a new generation of AI accelerators around a novel memory architecture. We are designing a full stack solution, from silicon to rack to software.
Building the fastest inference solution for frontier models
Industry
Technology, Information and Internet
Company size
11-50 employees
Headquarters
Mountain View, CA
LinkedIn followers
2,633
DensityAI is building a new generation of AI accelerators around a novel memory architecture. We are designing a full stack solution, from silicon to rack to software.