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Jobs at Codasip (Now Hiring) — 3 open

Codasip logoCodasip

Technical Team Lead

Brno, South Moravian Region, Czechia · Hybrid

Senior$35M raised

Welcome to Codasip At Codasip, we’re redefining the future of computing. Following a bold strategic pivot toward cyber-resilient semiconductor architectures, we are building next-generation processors and systems where s…

Skills: Python, Software Engineering, Team Leadership, Software Architecture, Continuous Integration

Codasip logoCodasip

Verification Engineer

Bristol, England, United Kingdom · Hybrid

Senior$35M raised

**Please note this role is only open to candidates currently located in and with working rights in the UK** Location: Preferably based at one of our UK design centres (Bristol or Cambridge). Seniority: Engineer, Senior, …

Skills: Functional Processor Verification, SystemVerilog, Python, C++, Rust

Codasip logoCodasip

Verification Engineer

Villeneuve-Loubet, Provence-Alpes-Côte d'Azur, France · Hybrid

Senior$35M raised

**Please note this role is only open to candidates with working rights in France** Location: Preferably based at our design center in Villeneuve-Loubet. Seniority: Engineer, Senior, Principal. Welcome to Codasip At Codas…

Skills: Functional Processor Verification, SystemVerilog, Python, C++, Rust

Codasip logo

Technical Team Lead

Codasip

Brno, South Moravian Region, Czechia • Hybrid

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  • Full-time
  • Posted 6d ago
  • ~40 hrs/week

Responsibilities

Lead a small engineering team focused on Studio EDA product lines while remaining hands-on with Python development. Manage the product backlog, promote engineering best practices, and drive the delivery of API and Command Line capabilities.

Requirements

Requires strong software engineering and Python development experience combined with a proven track record of mentoring or leading engineers. Proficiency with CI/CD tools, Linux, and Docker is expected, with a preference for experience in semiconductor or EDA environments.

Full job description

Welcome to Codasip

At Codasip, we’re redefining the future of computing. Following a bold strategic pivot toward cyber-resilient semiconductor architectures, we are building next-generation processors and systems where security is embedded at the very core by design, not as an afterthought. As we expand our portfolio of secure, CHERI-enabled technologies and focus on delivering architecture-first security solutions, there has never been a more exciting time to join. Be part of a global team shaping the next era of secure computing where innovation, ownership, and impact go hand in hand.



Hiring Manager: Edward Butler
Job Title: Team Leader
Reporting Line: Edward Butler
Location: Brno-based
Type: Full-time
Desired Start Date: August/September

The Impact You'll Make

We are looking for a technically strong and people-focused Team Leader to lead a small engineering team working on our Studio EDA product lines.

You will manage a team of two engineers, including one team member based in Brno and one working remotely (CZ). Alongside people leadership, you will stay close to the code, support backlog delivery, and help the team maintain strong development standards.

  • Contribute hands-on to development, especially in Python-based environments
  • Maintain and prioritize a backlog of work in partnership with stakeholders
  • Promote engineering best practices across development, testing, and release activities
  • Support the delivery of Studio product deployments.
  • Drive work across themes such as Command Line and API capabilities
  • Help stabilize team execution and improve release readiness
  • Work within Agile ceremonies including stand-ups, planning, refinement, and retrospectives
  • Contribute to roadmap discussions, feature scoping, and longer-term product direction

What You Bring to the Table

  • Strong experience in software engineering, algorithms and development
  • Solid Python development background
  • Experience leading or mentoring engineers in a technical environment
  • Good understanding of software architecture and engineering best practices
  • Experience with continuous integration and testing approaches
  • Ability to balance people leadership with hands-on technical contribution
  • Strong communication skills and the ability to work across technical and non-technical stakeholders
  • Strong ownership, initiative, prioritization, and time management

You should also be comfortable working with technologies and tools including, not exclusively GitLab CI, TeamCity (Kotlin), Linux, C++, Docker, Jira, and Confluence – or suitable equivalents.

The Extra Mile

  • Experience with public cloud platforms, especially AWS
  • Exposure to semiconductor or EDA-related environments
  • Knowledge of the IP-AXCT standards
  • Experience supporting complex shared codebases and release cycles
  • Interest in products that support SoC development and multiple IP/component workflows

Why this role matters now

This hire is important to the ongoing development of Studio and to the wider company transition toward semiconductor-focused solutions. A key technical challenge in the coming months is helping extend existing codebases to support the EDA of producing SoCs, moving from single-CPU assumptions toward more complex systems with multiple IPs and components.

You will be joining at a meaningful point, where your leadership can help the team deliver current priorities while also shaping future direction.

Get to Know Us Better

  • Codasip
  • Why Codasip went all-in on CHERI
  • Codasip strategic pivot announcement

Related keywords

PythonC++EDASemiconductorsCHERISoCGitLab CITeamCityLinuxDockerJiraConfluenceAWSAgileSoftware ArchitectureIP-AXCT

About Codasip

LinkedInVisit site

We focus on the rapidly growing need for cyber-resilient semiconductor architectures and System-on-Chips.

Industry
Semiconductors
Company size
201-500 employees
Founded
2014
Headquarters
Munich
LinkedIn followers
20,217
Total funding
$35M

Codasip is a processor solutions company which helps developers to differentiate their products. We are Europe’s leading RISC-V company with a global presence. Billions of chips already use our technology. In today’s technology market, differentiation is everything. The difference between success and failure. And, in chip design, this difference is quite literally wafer thin. With increasing transistor costs, your developers can no longer rely on semiconductor scaling and legacy processors to achieve your goals. The only way forward is to implement custom compute with designs tailored to your applications. We deliver custom compute through the combination of the open RISC-V ISA, Codasip Studio processor design automation and high-quality processor IP. Our innovative approach lets you easily customize and differentiate your designs. You can develop high-performing, and game-changing products that are truly transformational. Founding member of RISC-V International. Founding member of the CHERI Alliance.

Offices: Paul-Gerhardt Allee 50, Munich, 81245, DE · Šumavská 416/15, Brno, 602 00, CZ · Route Départementale 6007, Villeneuve-Loubet, 06270, FR · 2 Redcliffe Way, Bristol, BS1 6NL, GB · 9 Hills Road, Cambridge, CB21GE, GB

Domain Specific ProcessorsElectronic Design AutomationRISC-VEmbedded Hardwareand Processor CustomizationSemiconductorHardwareEmbedded SystemsInternet of ThingsRISC
View all jobs at Codasip

About Codasip

LinkedInVisit site

We focus on the rapidly growing need for cyber-resilient semiconductor architectures and System-on-Chips.

Industry
Semiconductors
Company size
201-500 employees
Founded
2014
Headquarters
Munich
LinkedIn followers
20,217
Total funding
$35M

Codasip is a processor solutions company which helps developers to differentiate their products. We are Europe’s leading RISC-V company with a global presence. Billions of chips already use our technology. In today’s technology market, differentiation is everything. The difference between success and failure. And, in chip design, this difference is quite literally wafer thin. With increasing transistor costs, your developers can no longer rely on semiconductor scaling and legacy processors to achieve your goals. The only way forward is to implement custom compute with designs tailored to your applications. We deliver custom compute through the combination of the open RISC-V ISA, Codasip Studio processor design automation and high-quality processor IP. Our innovative approach lets you easily customize and differentiate your designs. You can develop high-performing, and game-changing products that are truly transformational. Founding member of RISC-V International. Founding member of the CHERI Alliance.

Offices: Paul-Gerhardt Allee 50, Munich, 81245, DE · Šumavská 416/15, Brno, 602 00, CZ · Route Départementale 6007, Villeneuve-Loubet, 06270, FR · 2 Redcliffe Way, Bristol, BS1 6NL, GB · 9 Hills Road, Cambridge, CB21GE, GB

Domain Specific ProcessorsElectronic Design AutomationRISC-VEmbedded Hardwareand Processor CustomizationSemiconductorHardwareEmbedded SystemsInternet of ThingsRISC
View all jobs at Codasip

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