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About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

          

Staff Analog Design Engineer

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds. ADI designs and manufactures analog, mixed-signal, and digital signal processing technologies that solve the toughest engineering challenges across industrial, automotive, communications, healthcare, and consumer markets. With approximately 24,000 employees worldwide and revenue exceeding $11 billion in FY25, ADI combines deep engineering expertise with customer collaboration to deliver innovation at the Intelligent Edge.

As a Staff Analog Design Engineer in ADI's Shanghai design center, you will design precision analog building blocks that set the accuracy and stability limits in the signal chain of ADI's products. Your work on references, amplifiers, bias networks, comparators, oscillators, and temperature sensors will directly determine offset, drift, and noise floors across products serving multiple application areas. This role involves close collaboration with global design teams across multiple time zones to advance precision analog capabilities on ADI's next-generation process technologies.

• Design and implement precision analog circuit blocks at the transistor level, including operational amplifiers, OTAs, voltage and current references, bandgaps, bias generators, comparators, oscillators, and temperature sensors
• Apply AI/ML techniques to enhance design automation, optimization, and modeling workflows
• Execute designs from schematic capture through simulation, layout oversight, and post-layout verification
• Perform matching analysis, noise budgeting, and systematic offset reduction to meet precision specifications across process corners and temperature
• Develop trimming and calibration strategies — including digitally enhanced techniques that leverage on-chip digital resources in advanced process nodes — to achieve target accuracy for references, amplifiers, and sensors over life and environment
• Support silicon bring-up, debug, and correlation of measured results against simulation predictions
• Collaborate with design teams on architecture trade-offs where precision metrics — offset, gain error, drift, PSRR, CMRR — compete against power, area, and bandwidth

• MSEE with 7+ years of analog IC design experience, or PhD with 5+ years (BSEE with equivalent depth considered)
• Strong transistor-level design skills for high-performance precision analog circuits
• Demonstrated ability to deliver designs through tape-out, silicon validation, and production release
• Solid understanding of CMOS and BCD process technologies, including device physics, matching, and layout-dependent effects
• Proficiency with Cadence IC design suite: Virtuoso, Spectre/APS, and AMS Designer
• Deep knowledge of noise analysis, offset trimming, and precision design techniques for references and amplifiers
• Fluent in Mandarin; strong English written and verbal communication skills for cross-site collaboration
• Ability to collaborate effectively across global, cross-functional teams

• Curiosity and initiative to explore AI/ML techniques and emerging tools that can transform design workflows, with an enthusiasm for discovering more effective ways of working
• Experience with advanced process nodes and high-voltage or low-power design techniques
• Familiarity with temperature compensation methods, curvature correction, and precision calibration architectures
• Strong analytical and problem-solving abilities

• Block-level and subsystem-level analog circuit ownership from specification through silicon bring-up
• Precision performance optimization including offset, drift, noise, PSRR, and CMRR across temperature and supply variations
• Reliability assessment including electromigration, hot-carrier injection, and NBTI effects
• Design-for-manufacturing and yield optimization through Monte Carlo analysis and statistical design centering

• Work closely with global design teams across multiple time zones to translate system-level accuracy and stability requirements into analog block specifications
• Contribute to design reviews and cross-team technical discussions
• Support evaluation of new process capabilities and identify opportunities for circuit improvement

At Analog Devices, you will work on meaningful engineering problems with real-world impact alongside world-class engineers. ADI fosters a culture of technical excellence, continuous learning, and collaboration, providing opportunities to grow while contributing to technologies that shape the future of the intelligent edge.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days