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$37k–$40k/yr
Full-time
bachelor degree, postgraduate degree
Annual bonus plan, Private medical insurance, Life insurance, Contributory pension scheme, Equity, 28 days annual leave
Posted 17h ago
~40 hrs/week
Responsibilities
The Graduate Verification Engineer will develop and execute verification plans for hardware blocks within Quantum Error Correction systems. They will also support the creation of testbenches and collaborate with multi-disciplinary teams to resolve issues and define verification strategies.
Requirements
Candidates must hold a Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related discipline. Essential requirements include an understanding of digital logic design and familiarity with HDL languages like Verilog or SystemVerilog.
Full job description
Cambridge, UK | Full-time | Permanent | Hybrid
Salary: £37,000 - £40,000
About us
Riverlane’s mission is to master quantum error correction (QEC) and unlock a new age of human progress. From advances in material and climate science, to complex chemistry simulation for new drug design, quantum computers will help humanity solve some of its most important challenges. But without QEC, the industry’s defining technical challenge, such breakthroughs can never be achieved. Riverlane is the world leader in QEC technology. QEC is a complex problem that requires a range of skills, talent and passion.
Having raised more than $125M in funding to date to accelerate our cutting-edge R&D in quantum error correction (QEC), Riverlane partners with many of the world’s leading quantum hardware providers and government agencies to make fault-tolerant quantum computing a reality. We’re making remarkable progress and growing fast.
About the role
We have an exceptional opportunity for a Graduate Verification Engineer to join our talented team of hardware designers and embedded software engineers. Together, you’ll deliver fully verified, high-performance, and trusted systems.
In this exciting role you'll have end-to-end visibility across the entire stack, owning different aspects of verification and shaping how quality and reliability are built into our cutting-edge technology. You do not need a background in quantum computing! You will learn this along the way.
What you will do - specific responsibilities:
As a Graduate Verification Engineer at Riverlane, you will:
Help with developing and executing verification plans for hardware blocks in Quantum Error Correction Systems
Learn and support the creation of testbenches using SystemVerilog and UVM
Run simulations and perform debugging to resolve issues in collaboration with the design team
Collaborate with multi-disciplinary teams to understand specifications and define verification strategies for Quantum Error Correction systems
Learn and apply best practices in verification to make methodology improvements
What we need - Essential Skills/Experience:
Bachelor’s or Master’s degree in Electrical Engineering, Computer Science or related discipline
Understanding of Digital Logic Design
Some familiarity with HDL languages (e.g. Verilog, SystemVerilog) and simulation tools
A comprehensive benefits package that includes an annual bonus plan, private medical insurance, life insurance, and a contributory pension scheme
Equity, so that our team can share in the long-term success of Riverlane
28 days annual leave, plus bank holidays and enhanced family leave
A diverse work environment that brings together experts in many fields (including software and hardware development, quantum information theory, physics and maths) and over 20 different nationalities
A learning environment that encourages individual, team and company growth and development, including a regular programme of learning events and training and conference budgets
How to apply
Please upload a CV and covering letter by clicking 'Apply'. Your covering letter should explain why you are applying for the job and what skills and experience you can bring to the role.
We review CVs as we receive them and interview as soon as we have applications that look like a good match. We do not use closing dates. So, please apply as soon as possible to avoid missing out on this role.
Everyone is welcome at Riverlane. We are an equal opportunities employer and encourage applications from eligible and suitably qualified candidates regardless of age, disability, ethnicity, gender, gender reassignment, religion or belief, sexual orientation, marital or civil partnership status, or pregnancy and maternity/paternity.
Women and other underrepresented groups may be less likely to apply for a role unless they meet all or nearly all of the requirements. If this applies to you, we still encourage you to apply - you may be a great fit, even if you don’t meet every single qualification. We’d love to hear from you.
If you need any adjustments made to the application or selection process so you can do your best, please let us know. We will be happy to help.
GDPR notice: Riverlane collects and processes personal data in accordance with applicable data protection laws. If you are a European Job Applicant see the privacy notice for further details.
Riverlane is the world leader in Quantum Error Correction (QEC), the technology that unlocks quantum computing's promise
Industry
Software Development
Company size
51-200 employees
Founded
2016
Headquarters
Cambridge, England
LinkedIn followers
21,554
Total funding
$121M
The fragility of qubits means today's quantum computers fail under an avalanche of data errors long before they reach utility-scale. Riverlane builds QEC tools and technology that correct quantum errors as quickly as they occur. Using sophisticated codes and decoders on proprietary QEC chips, our technology identifies and corrects errors millions, and ultimately billions, of times per second.
We accelerate the quantum ecosystem by working closely with many of the world's leading quantum computer manufacturers, government bodies and high-performance computing (HPC) centres. Together, we're opening a world of new possibilities.
Offices: First Floor, St Andrews House, 59 St Andrews Street, Cambridge, England CB2 0BZ, GB · One Broadway, 14th Floor, Cambridge, MA 02142, US
Riverlane is the world leader in Quantum Error Correction (QEC), the technology that unlocks quantum computing's promise
Industry
Software Development
Company size
51-200 employees
Founded
2016
Headquarters
Cambridge, England
LinkedIn followers
21,554
Total funding
$121M
The fragility of qubits means today's quantum computers fail under an avalanche of data errors long before they reach utility-scale. Riverlane builds QEC tools and technology that correct quantum errors as quickly as they occur. Using sophisticated codes and decoders on proprietary QEC chips, our technology identifies and corrects errors millions, and ultimately billions, of times per second.
We accelerate the quantum ecosystem by working closely with many of the world's leading quantum computer manufacturers, government bodies and high-performance computing (HPC) centres. Together, we're opening a world of new possibilities.
Offices: First Floor, St Andrews House, 59 St Andrews Street, Cambridge, England CB2 0BZ, GB · One Broadway, 14th Floor, Cambridge, MA 02142, US