Jobs at Majestic Labs ai (Now Hiring) — 6 open

About us:

At Majestic, we’re re-architecting systems for the future of AI. We’re on a mission to make AI ubiquitous by leveraging groundbreaking technologies. If you’re passionate about deep tech and full stack AI, this is a chance to join our world-class team shaping the future of AI.

Role Description:

We’re looking for a systems software engineer to work on the lowest layers of that stack: the runtime, firmware, and device software that sit between high-level AI workloads and custom accelerator hardware. You’ll help build the software responsible for device bring-up, kernel dispatch, memory mapping, queueing, synchronization, performance monitoring, and debug infrastructure.

This is not a conventional embedded firmware role. The work spans firmware, operating-system interfaces, simulator bring-up, accelerator runtime design, hardware/software contracts, and performance-critical execution paths.

What You’ll Do

• Own critical boot and runtime contracts: firmware image layout, configuration, core release, liveness detection, shared queues, command/completion formats, memory mappings, and versioned ABIs.
• Build and optimize low-latency communication paths between host runtime software and accelerator cores, including submission/completion queues, doorbells, interrupts, polling paths, and synchronization mechanisms.
• Work with custom processor cores, multi-core coordination, traps/exceptions, page tables, protection mechanisms, MMIO, DMA, and accelerator memory hierarchies.
• Develop observability and debug infrastructure for a complex distributed accelerator system, including boot metrics, hardware counters, trace capture, performance monitoring, debug paths, and failure diagnosis for hung or slow jobs.
• Help shape the production device software architecture: the boundary between kernel-mode components, userspace runtime libraries, simulator backends, and hardware-native backends.
• Collaborate closely with hardware architects, compiler/runtime engineers, kernel developers, and performance engineers to define the software/hardware contracts for future chips.
• Debug issues that cross abstraction layers: AI graph execution, runtime scheduling, device queues, firmware, memory translation, interrupts, simulator behavior, and hardware state.

Requirements

What We’re Looking For

• 5+ years of experience building low-level systems software, firmware, runtimes, operating systems, device drivers, or accelerator software.
• Strong C programming skills and comfort reading or writing assembly where needed.
• Deep understanding of computer architecture fundamentals: CPU privilege modes, virtual memory, interrupts, atomics, caches, memory ordering, MMIO, DMA, and performance counters.
• Experience with one or more of: processor firmware, ARM or RISC-V systems software, Linux kernel drivers, bare-metal firmware, bootloaders, hypervisors, RTOS internals, or accelerator runtimes.
• Ability to design and maintain stable binary interfaces and versioned contracts between independently evolving software components.
• Strong debugging instincts across hardware/software boundaries, including cases where the only available evidence is a memory dump, trace buffer, hardware counter, queue state, or simulator log.
• Comfortable working in a fast-moving environment where simulators, firmware, drivers, runtime libraries, and hardware specs are evolving together.
• Excellent communication skills and the ability to collaborate across hardware, compiler, runtime, and product teams.

Especially Relevant Experience

• Experience with custom accelerators, GPUs, NPUs, SmartNICs, DPUs, or other complex SoCs.
• Low-level firmware experience, especially privilege modes, control/status registers, traps, memory protection, virtual memory, multi-core boot, or hardware debug support.
• Linux driver or userspace driver/runtime experience, including ioctl/mmap APIs, DMA, IRQ handling, polling vs interrupt tradeoffs, and zero-copy paths.
• Experience with hardware trace and performance infrastructure such as ARM CoreSight, ETM/ETF/ETR, ATB funnels, hardware PMUs, trace encoders, or similar SoC observability systems.
• Experience designing queue protocols, command buffers, completion queues, doorbells, synchronization objects, or low-latency producer/consumer systems.
• Experience with simulator and silicon bring-up: QEMU, virtual platforms, SystemC, RTL simulation, FPGA/prototyping, or first-silicon debug.
• Experience with modern build systems such Bazel, cross-compilation, freestanding toolchains, linker scripts, and hermetic build systems in general.

Why Join Majestic?

• You’ll work on the software foundation for a new AI computing platform, at the layer where architecture decisions become real system behavior.
• Your work will directly affect boot time, runtime performance, performance visibility, debuggability, and the programming model exposed to higher-level AI software.
• You’ll collaborate with a small, highly technical team across hardware, systems, compilers, and AI runtime software, with room to define major pieces of the stack from first principles.