Staff/Principal SERDES Applications Engineer

Location
Zhubei, Taiwan
Workplace
On-site

About this role

Role Overview

We are seeking an experienced Applications Engineer specializing in advanced high-speed Ethernet SerDes technologies. In this key technical role, you will bridge the gap between silicon architecture, firmware development, hardware qualification, and customer implementation.

You will work closely across cross-functional groups—including ASIC design, manufacturing, test, calibration, and reliability teams—while providing technical leadership and direct customer engagement.

What you'll do

Technical Leadership & Customer Engagement

  • Direct Customer Interaction: Drive direct technical support, debug complex issues, and deliver technical training for customers and Field Application Engineers (FAEs).
  • Cross-Functional Collaboration: Lead hardware/software bring-up efforts in collaboration with ASIC, manufacturing, test, calibration, and reliability engineering teams.
  • Project Management: Manage multiple complex tasks and project timelines concurrently.

Hardware & System Integration

  • Schematic & Layout Review: Review PCB schematics and board layouts for high-speed signal integrity and hardware compatibility.
  • Lab Debug & Measurement: Perform hands-on debugging using Ethernet traffic generators, high-speed oscilloscopes, jitter analyzers, spectrum analyzers, network analyzers, and OTN testers.

Education & Experience

  • Degree: BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
  • Experience: 8–10+ years of practical experience in high-speed hardware, SerDes, or system/board engineering.

What We're Looking For

  • SerDes & PHY Expertise: Strong working knowledge of high-speed (224Gbps / 112Gbps+) PHYs and SerDes architectures.
  • Ethernet & Optical Standards: Deep knowledge of 100Gbps / 200Gbps / 400Gbps optical systems and standards; OTN experience is a plus.
  • PAM4 Modulation: Hands-on experience with PAM4 signaling and high-speed Signal Integrity (SI) analysis.
  • SoC Architecture: Experience in architecture, programming, or support of complex System-on-Chip devices.
  • Direct experience with MACsec (802.1AE) key management and data-plane acceleration.
  • PTP (IEEE 1588) hardware timestamping / clock recovery synchronization in optical hardware.
  • Reliability & Failure Analysis: Background driving product qualification, stress testing, reliability investigations, and board-level failure analysis (FA).

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