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Jobs at SignOff Semiconductors (Now Hiring) — 9 open

SignOff Semiconductors logoSignOff Semiconductors

Lead Engineer - DFT

Bengaluru, Karnataka, India · On-site

Senior

hire with 6+ year About the job About the Role: We are hiring an experienced DFT (Design-for-Test) Lead to join our growing team. The ideal candidate will have strong technical expertise in Scan, ATPG, MBIST, post-silico…

Skills: DFT, Scan, ATPG, MBIST, Post-silicon Bring-up

SignOff Semiconductors logoSignOff Semiconductors

Design Engineer II - AMS Layout

Hyderabad, Telangana, India · On-site

Mid level

Looking for AMS Layout Engineers with 3–5 years of experience in analog and mixed-signal layout design. Candidate should have strong understanding of VLSI fundamentals, layout methodologies, and physical design from floo…

Skills: Analog Layout, Mixed-Signal Layout, VLSI, Physical Design, FinFET

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Physical Design Senior Engineer

George Town, Penang, Malaysia · Hybrid

$130k–$200k/yr

Senior

Hi All, I'm opening a req for a Senior Engineer - Physical Design Engineer for our client Microchip. We are looking to onboard 5 engineers preferably between 7-9 years' experience. The candidate will have to be physicall…

Skills: Physical Design, RTL to GDSII, Floorplanning, Clock Tree Synthesis, Static Timing Analysis

SignOff Semiconductors logoSignOff Semiconductors

Physical Design - STA Senior Engineer

George Town, Penang, Malaysia · Hybrid

$130k–$200k/yr

Senior

Hi All, I'm opening a req for a Senior STA Engineer - Physical Design for our client Microchip. We are looking to onboard 5 engineers preferably between 6-9 years' experience. The candidate will have to be physically loc…

Skills: ASIC/SOC STA, Timing Constraints Generation, Timing Closure, Tempus, Primetime

SignOff Semiconductors logoSignOff Semiconductors

Physical Design Lead Engineer

George Town, Penang, Malaysia · Hybrid

$235k–$275k/yr

Senior+

Hi All, I'm opening a req for a Lead - Physical Design Engineer for our client Microchip. We are looking to onboard someone preferably with over 10+ years' experience. The candidate will have to be physically located out…

Skills: Physical Design, RTL to GDSII, Floorplanning, Clock Tree Synthesis, Static Timing Analysis

SignOff Semiconductors logoSignOff Semiconductors

Physical Design - STA Lead

George Town, Penang, Malaysia · Hybrid

$235k–$275k/yr

Senior+

Hi All, I'm opening a req for a STA Lead - Physical Design Engineer for our client Microchip. We are looking to onboard someone preferably with over 10+ years' experience. The candidate will have to be physically located…

Skills: Static Timing Analysis, ASIC/SOC, Timing Constraints, Tempus, Primetime

SignOff Semiconductors logoSignOff Semiconductors

Physical Design Senior Lead

George Town, Penang, Malaysia · Hybrid

$250k–$325k/yr

Senior+

Hi All, I'm opening a req for a Senior Lead - Physical Design Engineer for our client Microchip. We are looking to onboard someone preferably with over 12+ years' experience. The candidate will have to be physically loca…

Skills: Physical Design, RTL to GDSII, Floorplanning, Clock Tree Synthesis, Static Timing Analysis

SignOff Semiconductors logoSignOff Semiconductors

Lead Engineer - Digital Design

Bengaluru, Karnataka, India · On-site

Senior

Job Title: Front-End Lead Engineer Location: Bangalore Department: Silicon Design Engineering / RTL Design Job Type: Full-Time Experience Level: Lead Engineer Years of Experience: 6–8 Years Role Overview The Front-End Le…

Skills: ASIC Front-End Design, RTL Development, Functional ECO, Verilog, System Verilog

SignOff Semiconductors logoSignOff Semiconductors

Design Engineer II - Digital Design

Bengaluru, Karnataka, India · On-site

Senior

RTL Positions 5967:Engineer III - HW Design: Positions:2 Location: Bangalore. Skills & Experience: 5-8 years of experience in ASIC front end design and quality check. Strong fundamental knowledge of digital design, Veril…

Skills: ASIC Front End Design, Digital Design, Verilog, Scripting Language, Lint

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Lead Engineer - DFT

SignOff Semiconductors

Bengaluru, Karnataka, India • On-site

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Senior

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  • Full-time
  • bachelor degree, postgraduate degree
  • Competitive Salary, Industry Standard Benefits
  • Posted 1d ago
  • ~40 hrs/week

Responsibilities

Lead and drive DFT architecture and implementation for SoCs, including Scan/MBIST insertion and ATPG pattern generation. Coordinate tapeout readiness and provide post-silicon bring-up support and yield analysis.

Requirements

Requires a B.E./B.Tech or M.E./M.Tech in Electronics/Electrical/VLSI with over 6 years of relevant DFT experience. Must have proven experience in tapeout, cross-domain collaboration, and team leadership.

Full job description

hire with 6+ year

About the job


About the Role:

We are hiring an experienced DFT (Design-for-Test) Lead to join our growing team. The ideal candidate will have strong technical expertise in Scan, ATPG, MBIST, post-silicon bring-up, and GLS (Timing Sim), along with proven leadership experience. If you're passionate about silicon quality and test architecture, this is your opportunity to shape high-impact silicon solutions from design to production.

Key Responsibilities:

  • Lead and drive DFT architecture and implementation for SoCs.
  • Hands-on execution of Scan/MBIST insertion, ATPG pattern generation & verification, MBIST verification, and GLS (Gate Level Simulation).
  • Post-silicon bring-up support, debug, and yield analysis.
  • Define and manage test mode timing constraints, work with timing teams for timing closure.
  • Coordinate tapeout readiness from DFT standpoint and ensure test quality.
  • Collaborate cross-functionally with RTL, STA, and PD teams for smooth integration.
  • Mentor and guide junior engineers in DFT methodologies and best practices.
  • Utilize scripting languages (Perl, Shell, etc.) for automation and flow enhancements.


Requirements

Qualifications:

  • B.E./B.Tech or M.E./M.Tech in Electronics/Electrical/VLSI.
  • 6+ years of relevant experience in DFT.
  • Strong understanding of test coverage, fault models, and DFT flow automation.
  • Prior experience in tapeout, cross-domain collaboration, and team leadership is a must.
  • Excellent interpersonal and communication skills.

Why Join Us?

  • Work on cutting-edge SoC and semiconductor projects.
  • Opportunity to lead, innovate, and grow in a collaborative environment.
  • Competitive salary and benefits as per industry standards.


Related keywords

DFTDesign-for-TestSoCScanATPGMBISTPost-silicon Bring-upGLSGate Level SimulationTiming ConstraintsTiming ClosureTapeoutRTLSTAPDPerl

About SignOff Semiconductors

LinkedInVisit site

SignOff Semiconductors, for all your ASIC / SoC, Embedded and turnkey requirements.

Industry
Semiconductor Manufacturing
Company size
201-500 employees
Founded
2015
Headquarters
Bengaluru , Karnataka
LinkedIn followers
60,703

SignOff Semiconductors Pvt Ltd, incorporated in 2015 in Bangalore, with the founders coming from companies like Intel, LSI and Texas Instruments. Signoff is engaged in VLSI services and turn key projects maintaining the core values of "Quality and Commitment"​. Come and join very Young and Dynamic team to grow your career to the next level.

Offices: No 3C-1001, 3rd Floor, 100 Ft Road, HRBR Layout 1st Block, Banswadi, Bengaluru , Karnataka 560043, IN · 6203 San Ignacio Ave, San Jose, CA 95119, US · 1st Floor, Vittal Rao Nagar, Gafoornagar, Telangana 500081, Telangana, Telangana 500081, IN · Cochrane Drive, Markham, ON L3R0B8, CA · Suntech, Penang 11950, MY

Physical DesignSynthesis & STAFlow DevelopmentLow Power Designsdigital designASIC DesignFPGA Designand RTL Design
View all jobs at SignOff Semiconductors

About SignOff Semiconductors

LinkedInVisit site

SignOff Semiconductors, for all your ASIC / SoC, Embedded and turnkey requirements.

Industry
Semiconductor Manufacturing
Company size
201-500 employees
Founded
2015
Headquarters
Bengaluru , Karnataka
LinkedIn followers
60,703

SignOff Semiconductors Pvt Ltd, incorporated in 2015 in Bangalore, with the founders coming from companies like Intel, LSI and Texas Instruments. Signoff is engaged in VLSI services and turn key projects maintaining the core values of "Quality and Commitment"​. Come and join very Young and Dynamic team to grow your career to the next level.

Offices: No 3C-1001, 3rd Floor, 100 Ft Road, HRBR Layout 1st Block, Banswadi, Bengaluru , Karnataka 560043, IN · 6203 San Ignacio Ave, San Jose, CA 95119, US · 1st Floor, Vittal Rao Nagar, Gafoornagar, Telangana 500081, Telangana, Telangana 500081, IN · Cochrane Drive, Markham, ON L3R0B8, CA · Suntech, Penang 11950, MY

Physical DesignSynthesis & STAFlow DevelopmentLow Power Designsdigital designASIC DesignFPGA Designand RTL Design
View all jobs at SignOff Semiconductors

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