Vancouver, Washington, United States · Hybrid
Location: Vancouver, WA/Chandler, AZ/Bay Area, CA (CA start remote then hybrid) Hybrid role requiring 3 days a week onsite Reports To: CEO Company Overview PowerLattice is a well-funded semiconductor start-up company bac…
Skills: Technical Program Management, Silicon IC Development, ASIC/SoC Design, Hardware Product Development, Risk Management
Vancouver, Washington, United States • Hybrid
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Lead end-to-end engineering program management for silicon IC and hardware development from concept through production. Coordinate cross-functional teams and external vendors to ensure high-quality product delivery on aggressive schedules.
Requires a Bachelor's degree in Engineering or Computer Science and over 10 years of program management experience in semiconductor or hardware environments. Must have a strong understanding of silicon IC development flows and experience managing third-party design and manufacturing partners.
PowerLattice is a well-funded semiconductor start-up company backed by well-known large Silicon Valley VCs. The company is working on the industry’s groundbreaking chiplet solution for a fundamental shift in how high-performance chips get powered, paving the way for the next generation of AI and advanced computing.
We are seeking an experienced Technical Program Management Lead to drive execution of complex silicon IC and hardware development programs from concept through production. This role will partner closely with engineering, operations, supply chain, and external vendors to ensure successful delivery of high-quality products on aggressive schedules.
Lead end-to-end engineering program management for silicon IC and hardware development projects from planning through production release.
Drive cross-functional execution across ASIC/SoC design, verification, physical design, firmware, hardware, validation, operations, and manufacturing teams.
Develop and maintain program schedules, milestones, dependencies, resource plans, and risk assessments.
Coordinate closely with third-party vendors, design partners, contractors, and manufacturing suppliers to ensure deliverables meet schedule, quality, and cost targets.
Track critical path items and proactively identify and resolve program risks, bottlenecks, and execution gaps.
Drive alignment between engineering teams and external partners on priorities, schedules, deliverables, and issue resolution.
Lead regular program reviews, status meetings, and executive updates.
Manage silicon development milestones including specification freeze, RTL release, tape-out, package development, board bring-up, validation, and production readiness.
Coordinate hardware development activities including PCB design, prototype builds, lab validation, and system integration.
Support engineering change management, issue tracking, and escalation management processes.
Ensure effective communication and coordination across geographically distributed teams and external vendors.
Drive continuous improvement in program management processes, execution methodologies, and operational efficiency.
This is a Hybrid role requiring 3 days a week onsite at our HQ’s in Vancouver, WA (Greater Portland Area) or Chandler, AZ. While we are primarily seeking candidates in HQ-Vancouer and Chandler, remote flexibility may be considered for exceptional candidates in Silicon Valley, CA.
Bachelor’s degree in Engineering, Computer Science, or related technical field.
10+ years of program management experience in semiconductor, ASIC/SoC, or hardware product development environments.
Strong understanding of silicon IC development flows including architecture, design, verification, physical design, tapeout, bring-up, and production.
Experience managing hardware development programs including PCB/system development and validation activities.
Proven experience coordinating and driving execution with third-party vendors, design houses, manufacturing partners, and suppliers.
Strong project planning and schedule management skills with the ability to manage complex cross-functional dependencies.
Experience managing aggressive development schedules and multiple concurrent deliverables.
Strong risk management, problem-solving, and decision-making skills.
Excellent communication, leadership, and stakeholder management abilities.
Experience using program management and collaboration tools such as Jira, Confluence, Smartsheet, MS Project, or equivalent.
Experience managing mixed-signal SoC or high-performance silicon development programs.
Familiarity with semiconductor manufacturing, packaging, test, and supply chain operations.
Experience supporting silicon bring-up, validation, and production ramp activities.
Compensation & Benefits
Competitive salary, stock option grant and benefits package
Health, dental, vision, 401(k), etc.
Breaking the AI power wall with the industry's first power delivery chiplet
PowerLattice redefines how power enters into processors with its groundbreaking power delivery chiplets. Combining on-die magnetic inductors, advanced micro-IVR circuits, a vertical design and a programmable software layer into a single chiplet die, PowerLattice enables the tightest coupling between power and compute, and delivers the breakthrough performance, efficiency and reliability for AI and data center infrastructure.
Breaking the AI power wall with the industry's first power delivery chiplet
PowerLattice redefines how power enters into processors with its groundbreaking power delivery chiplets. Combining on-die magnetic inductors, advanced micro-IVR circuits, a vertical design and a programmable software layer into a single chiplet die, PowerLattice enables the tightest coupling between power and compute, and delivers the breakthrough performance, efficiency and reliability for AI and data center infrastructure.
