FPGA Design - Lead Research Engineer "CLEARANCE REQUIRED"

Job Description Summary

As a Lead FPGA Research Engineer within GE Vernova Advanced Research, you will architect and develop state-of-the-art embedded systems for real-time controls and industrial communication applications. You will play a pivotal role in bridging the gap between cutting-edge research and industrial reality, working on projects that support GE Vernova’s mission across Renewables, Gas Power, and Grid Solutions. In this role, you will lead R&D initiatives, often in partnership with U.S. Government Agencies (DOE, DOD), national labs, and academic institutions, to drive the energy transition toward a sustainable, zero-carbon future.

Job Description

Roles and Responsibilities

In this role, you will:

• Lead the development of FPGA solutions for embedded systems and industrial control systems (ICS)
• Leverage FPGA design tools to develop, simulate, test, and optimize real-time embedded systems
• Shape and pursue external opportunities with U.S. government agencies such as the DOE and DOD
• Partner with GE businesses to transition real-time embedded controls and communication systems from early-stage lab demonstrations to fieldable prototypes
• Collaborate with universities, industrial consortiums, and commercial partners to advance the state of the art in embedded systems
• Publish technical papers, file patents, and contribute to open-source communities
• Provide technical leadership and mentorship to junior engineers on FPGA design best practices

Required Qualifications

• Ph.D. degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field, with at least 1-3 years of industry experience.
• Bachelor or master’s degree in computer science, Electrical Engineering, or a related field, with at least 3-5 years of industry experience.
• A minimum of 3-5 years of professional experience in FPGA and embedded systems design
• 3+ years of experience with Xilinx and/or Intel (Altera) FPGA devices, tools, and ecosystems (e.g., ModelSim, Intel Quartus, Xilinx Vivado)
• 3+ years of experience with digital logic design, including FSMs, pipelining, and resource optimization
• 3+ years of experience with at least one of the high-speed and standard interfaces (UART or SPI or I²C or Ethernet or PCIe, DDR)
• 3+ years of experience developing testbenches and performing functional verification
• 3+ years of experience with clock domain crossing (CDC) techniques and metastability mitigation
• 3+ years of experience with FPGA or ASIC design using Verilog, System Verilog, or VHDL
• 3+ years of experience in FPGA design flow including simulation, synthesis, place & route, static timing analysis, timing closure.

Desired Qualifications

• Active security clearance desired
• Experience with Linux build systems (e.g., Yocto, Buildroot,..)
• Working knowledge of real-time operating systems (e.g., QNX, RTLinux, VxWorks)
• Working knowledge of Linux driver and/or kernel development
• Experience writing firmware and low-level programming (e.g., microcontrollers)
• Familiarity with virtualization technologies such as hypervisors and Docker containers
• Familiar with on-chip debugging tools (e.g., ILA or SignalTap)
• Familiar with reading and interpret schematics, timing diagrams, and hardware datasheets
• Experience developing real-time embedded applications on microcontrollers, FPGAs, x86, and/or ARM processors
• Experience with writing embedded programming software (e.g., C/C++, C#, Python)
• Experience with high-level synthesis (HLS) tools and algorithm-to-hardware workflows, including Vitis HLS and integration with MathWorks MATLAB/Simulink for model-based design and verification
• Experience using version control systems (Git preferred)
• Experience with CI/CD technologies (e.g., GitLab, Jenkins)
• Familiar experience with microcontrollers, microprocessors, or SoC-based platforms and associated hardware interfaces (e.g., SPI, I2C, UART, CAN, Ethernet)
• Familiar with industrial communication protocols (e.g., Modbus, DNP3, OPC UA, IEC 61850, MQTT, BACnet) and familiarity with data serialization formats (Protocol Buffers, JSON).
• Ability to integrate existing real-time analytics, anomaly detection, and secure data pipelines into edge and embedded applications
• Experience developing for Linux systems or Real-time operating systems
• Experience with the full embedded systems development lifecycle, including requirements, design, implementation, testing, and debugging.

Eligibility Requirements

• Must be willing to work out of an office located in Niskayuna, NY
• Legal authorization to work in the US is required. We will not sponsor individuals at the Bachelor's or Master’s level for employment visas, now or in the future, for this job opening.

This role requires access to U.S. export-controlled information. If applicable, final offers will be contingent on ability to obtain authorization for access to U.S. export-controlled information from the U.S. Government.

Additional Information

For candidates applying to a U.S. based position, the pay range for this position is between $98,400.00 and $164,000.00. The Company pays a geographic differential of 110%, 120% or 130% of salary in certain areas. The specific pay offered may be influenced by a variety of factors, including the candidate’s experience, education, and skill set.Bonus eligibility: discretionary annual bonus.This posting is expected to remain open for at least seven days after it was posted on November 12, 2026.Available benefits include medical, dental, vision, and prescription drug coverage; access to Health Coach from GE Vernova, a 24/7 nurse-based resource; and access to the Employee Assistance Program, providing 24/7 confidential assessment, counseling and referral services. Retirement benefits include the GE Vernova Retirement Savings Plan, a tax-advantaged 401(k) savings opportunity with company matching contributions and company retirement contributions, as well as access to Fidelity resources and financial planning consultants. Other benefits include tuition assistance, adoption assistance, paid parental leave, disability benefits, life insurance, 12 paid holidays, and permissive time off.GE Vernova Inc. or its affiliates (collectively or individually, “GE Vernova”) sponsor certain employee benefit plans or programs GE Vernova reserves the right to terminate, amend, suspend, replace, or modify its benefit plans and programs at any time and for any reason, in its sole discretion. No individual has a vested right to any benefit under a GE Vernova welfare benefit plan or program. This document does not create a contract of employment with any individual.