Aalap Tripathy

I am currently working to advance the state of the art in Federated Edge-to-Exascale workflows & create aData Foundation for AI workflows at Hewlett Packard Labs (AI Research Lab). Previously I worked at HPE's Moonshot, Hyperscale, HPC and Edge & IoT Systems R&D teams designing and evangelizing HPE's Moonshot micro-servers for software defined & workload optimized datacenter (https://www.hpe.com/us/en/servers/moonshot.html)., invented a new "product category" Converged Edge Systems - enabling hardware convergence of OT and IT technologies (https://www.hpe.com/us/en/servers/edgeline-iot-systems.html) My prior work involved system design, prototyping, validation, data pipeline architecture, performance characterization/benchmarking, bringup, solution engineering with internal/external partners - promoting the best utilization of system capabilities in real-world use cases. In this I have to regularly straddle hardware & software - the worlds of High Performance Computing, Big Data Analytics, Embedded Systems and AI for best impact. I am equally at home busy dicing Board schematics, OS Kernels, Systems and/or component firmware or developing or analyzing an algorithm or its performance in a real-world deployments. I collaborate with HPE's Chief Technologists, R&D Engineers across BU’s & external partners for future architecture exploration and analysis, building Proof-of-Concept prototypes for Emerging Technologies (FPGAs & special-purpose ASIC workload accelerators). I completed my Ph.D. in Computer Engineering at the Embedded Systems & Co-design Lab, Texas A&M University. I worked on designing and benchmarking novel many-core platforms for data-intensive computing applications (Search and Recommendation Engines in particular). I have also done a BE, EEE from BITS Pilani, India and subsequently held several leadership positions in its global alumni organization (BITSAA Int) In Grad School, I worked with my colleagues in proposing and validating techniques to improve search engine latency while incorporating semantic disambiguation with systems designs encompassing novel ASICs, GPU, FPGA, novel Intel many-core processors etc.). My interests subsequently moved to machine learning algorithms used in collaborative filtering/recommendation systems where I designed my own hybrid reconfigurable data intensive compute processor architecture.