Analog Design Engineer
About this role
Role Overview
As a Analog Design Engineer at TYLsemi, you will design and deliver high-performance analog and mixed-signal circuits that enable robust, manufacturable silicon. This role spans a wide experience range (5–30 years) and is ideal for engineers who combine strong fundamentals with practical execution—translating system requirements into silicon-ready designs, validating performance across corners, and partnering closely with layout, verification, test, and product teams to drive first-time-right outcomes.
What You’ll Do
- Design of Voltage Regulators including high-efficiency power stages, error amplifiers, current sensing, adaptive load-line circuits, fast transient compensation, protection and telemetry.
- Modeling of mixed-signal subsystems including Regulator control loops, Power delivery network, DVFS subsystems etc. to guide architecture and design trade-offs
- Lead the collaboration with SIPI/PI, packaging teams to co-optimize VR and power delivery.
What We’re Looking For
- 8+ years of hands-on analog/mixed-signal IC design experience with a strong focus on high-current, high-efficiency Power management (PMIC / IVR / DC-DC converters).
- Deep expertise in different voltage regulator topologies including control loops delivering large current at high switching frequencies.
- Hands-on experience in magnetics integration for high-density IVR — including inductor modeling, coupling effects, EMI/thermal co-optimization, and 3DIC package integration.
- Proficiency with industry-standard design and modelling tools including Cadence Virtuoso, Spectre, Clarity/EMX, MATLAB/Simulink.
- Experience in 2.5D, packaging flows and co-design with SIPI/PDN teams.
- Team player with excellent communication skills
- BS / MS / PhD in Electrical Engineering (Analog & Mixed-Signal focus)
Nice to Have
- Experience with state-of-the-art AI/HPC power delivery.
- Experience in designing power management switching regulators, including Buck, Boost, Buck-Boost, LDO, and other PMIC building blocks.
- Strong background in power management circuits such as LDOs, bandgap references, voltage/current references, protection circuits, start-up circuits, transient response optimization, and related analog power management functions.
- Familiarity with advanced packaging flow and thermal/PI co-optimization
Success in This Role Looks Like
- Analog blocks meet spec with margin across PVT, mismatch, and post-layout effects
- Design reviews are crisp: requirements, tradeoffs, and risks are clearly articulated and managed
- Silicon bring-up converges quickly through strong correlation, structured debug, and decisive fixes
- Cross-functional partners (layout, verification, test, validation) can execute efficiently with clear interfaces and documentation
- Reusable design collateral and improved methodology reduce cycle time and increase first-pass success
Company at a glance
AI silicon doesn't fail on compute. It fails on the infrastructure around it — power delivery, connectivity, and memory that weren't designed for the scale, speed, and packaging requirements of modern AI systems.
TYLsemi builds the chiplet infrastructure layer that solves this. Purpose-built for XPUs and Networking. Standards-based. Designed to integrate directly into your silicon program — not adapted from something else.
We're hiring across the US and India. Come build what's missing.
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