Senior Engineer, FPGA

Singapore · On-site

About this role

Company Overview

Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.

Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.

Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.

We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.

At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve.

If that's you, join us — the intelligence everywhere revolution starts here.

 

As the Senior Engineer, FPGA at Ambiq, you will drive the development and rendering of FPGA images in support of our pre-silicon prototyping environments.  

 

In this role, you will work with our SoC design, software development, design verification, and system test teams as our primary internal customers for the FPGA images.  

 

The successful candidate will have experience in RTL design, verification, and FPGA/Prototyping platform creation to support Design Verification, Validation, Software Development and System Test at the pre-silicon phase.  

The person in this role must be comfortable working with RTL to implement specialized changes to the SoC database for the FPGA development flow. This role will require defining and implementing internal and external FPGA timing constraints to enable repeated delivery of design iterations to the software and validation teams. The candidate will be required to debug RTL designs using FPGA tools, external logic analyzers, and protocol analyzers. 

Responsibilities 

  • Implement and debug FPGA designs on AMD FPGA based prototyping platforms using Xilinx Vivado and ISE tools. 
  • Implement and debug FPGA designs on a Stratix-10 development board using Intel Quartus prime Pro.  
  • Support a regression test-suite consisting of system-level test cases to validate updated FPGA builds.  
  • Assist development teams in reproduction, triage, and debug of issues both pre-silicon and post-silicon 
  • Define and implement timing constraints. 

Qualifications 

  • BSEE or BSCE with 6+ years of SoC design, verification, or related work experience and 8+ years of experience of FPGA design, bring-up, debugging, and verification. 
  • In-depth knowledge of top-down FPGA development process with recent experience with FPGA-based prototyping on an FPGA development platform. 
  • Solid experience with defining timing constraints for Static Timing Analysis. 
  • Some familiarity with Cadence SoC design flow. 
  • Expertise in both Intel Quartus Prime Pro and Xilinx Vivado suites. 
  • Solid understanding of the tool flow from RTL to bitstream. 
  • Some familiarity with programming in C language. 
  • Familiarity with source code control systems (git) required. 
  • Familiarity with simulation tools. 
  • Hands-on lab bring-up experience, debug, and instrument usage. 

In addition, the following areas of experience are highly desirable for the position but not strictly required: 

  • In-depth experience with Stratix 10 FPGA platforms: boards, debug, performance, and throughput tuning. 
  • In-depth experience with AMD VU19P prototyping systems, debug, design partitioning, performance, and throughput tuning. 
  • Experience with Siemens proFPGA prototyping/emulation platform and VPS software. 
  • Experience with ARM’s MPS4 platform. 
  • Experience with low power designs. 
  • Experience with embedded microprocessors. 
  • Proven design validation skills. 
  • In-depth experience writing Verilog code. 
  • Experience with System Verilog verification environments. 
  • Good analytical skills. 
  • Python script experience. 
  • YAML 
  • Peripheral protocols: I2C, I3C, MSPI, UART, USB 

 

Company at a glance

Ambiq® was founded in 2010 on the simple yet powerful notion that extremely low-power semiconductors are the key to the future of electronics. Through the use of pioneering ultra-low power technology, innovative companies around the world are developing differentiated solutions that reduce or eliminate the need for batteries, reduce overall system power and maximize industrial design flexibility.

Our mission is to enable intelligence (artificial intelligence (AI) and beyond) everywhere by delivering the lowest power semiconductor solutions. We enable our customers to deliver artificial intelligence compute at the edge where power consumption challenges are the most profound. Our technology innovations, built on the patented and proprietary subthreshold power optimized technology (SPOT), fundamentally deliver a multi-fold improvement in power consumption over traditional semiconductor designs. We’ve powered over 270 million devices today.

As we see the shift in devices move from “smart” to “AI,” our technology and solutions have evolved to accommodate the power requirements needed to enable feature rich devices that are always on, high performing, secure, accurate, energy efficient, and just as important practical. Our leadership in powering devices made for edge AI has helped technology innovators across wearable, smart home and buildings, industrial, healthcare, and other sectors deliver intelligent devices that can do more while consuming less.

For more information, visit www.ambiq.com.

Founded2010
Team Size201-500 employees
WorkspaceOn-site
IndustrySemiconductor Manufacturing
Location
Singapore
Websiteambiq.com
LinkedInLinkedIn

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