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Sr Staff Engineer, SoC RTL Design
full-time•Toronto
About this role
<div class="content-intro"><p>Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.</p></div><p>We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance-aware design.</p>
<p>This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin. </p>
<p>We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.</p>
<p> </p>
<p><strong>Who You Are</strong></p>
<ul>
<li>A digital design expert with a deep understanding of computer architecture and IP microarchitecture.</li>
<li>Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows.</li>
<li>Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals.</li>
<li>A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning.</li>
</ul>
<p><br><strong>What We Need</strong></p>
<ul>
<li>Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components.</li>
<li>Performance-aware design decisions for compute, interconnect, or memory-heavy blocks.</li>
<li>Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows.</li>
<li>Strong synthesis and timing closure awareness to support backend teams.</li>
<li data-stringify-indent="0" data-stringify-border="0">Prior experience in on-chip fabric and interconnect designs is an asset.</li>
</ul>
<p><br><strong>What You Will Learn</strong></p>
<ul>
<li>How cutting-edge AI chips are built, from spec to silicon.</li>
<li>What it takes to collaborate with teams designing novel processor and memory architectures.</li>
<li>How to blend custom logic with standard SoC elements for power and scale.</li>
<li>How cross-functional workflows come together across design, DV, physical, and firmware teams.</li>
</ul>
<p> </p>
<p><em>Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.</em></p><div class="content-conclusion"><p><em>This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.</em></p></div>
What you'll do
- The role involves architecture and RTL implementation of custom IP blocks and SoC components, as well as making performance-aware design decisions. Additionally, contributions to validation using emulation or FPGA prototyping may be required.
About Tenstorrent
Tenstorrent is a next-generation computing company that builds computers for AI.
Headquartered in the U.S. with offices in Austin, Texas, and Silicon Valley, and global offices in Toronto, Belgrade, Seoul, Tokyo, and Bangalore, Tenstorrent brings together experts in the field of computer architecture, ASIC design, RISC-V technology, advanced systems, and neural network compilers. Tenstorrent is backed by Eclipse Ventures and Real Ventures, Archerman Capital, Samsung Catalyst Fund, and Hyundai Motor Group among others.
Join us: www.tenstorrent.com/careers.
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Frequently Asked Questions
What does a Sr Staff Engineer, SoC RTL Design do at Tenstorrent?
As a Sr Staff Engineer, SoC RTL Design at Tenstorrent, you will: the role involves architecture and RTL implementation of custom IP blocks and SoC components, as well as making performance-aware design decisions. Additionally, contributions to validation using emulation or FPGA prototyping may be required..
Is the Sr Staff Engineer, SoC RTL Design position at Tenstorrent remote?
The Sr Staff Engineer, SoC RTL Design position at Tenstorrent is based in Toronto, Canada. Contact the company through Clera for specific work arrangement details.
How do I apply for the Sr Staff Engineer, SoC RTL Design position at Tenstorrent?
You can apply for the Sr Staff Engineer, SoC RTL Design position at Tenstorrentdirectly through Clera. Click the "Apply Now" button above to start your application. Clera's AI-powered platform will help match your profile with this opportunity and guide you through the application process.