About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

The proliferation of the data economy is accelerating and creating significant strains on the global data infrastructure. Built on decades of expertise and execution, Marvell’s custom ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property (IP) and a wide-array of flexible business models.
We are looking for a Physical Design Engineer Intern to join Marvell’s Design Center in Bucharest, Romania to learn about: system-on-chip (SOC) implementation, floorplanning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity analysis, and physical verification of designs to ensure successful tapeout and delivery to our customers.

We are looking for 3rd year students pursuing a Bachelor degree in Electronics, Computer Science or related technical field(s).

What You Can Expect

• Learning the Digital Physical Design flow including Synthesis, Place and Route, Static Timing Analysis, Physical Verification (DRC/LVS)

• Use state-of-the-art place-and-route and signoff EDA tools and flows (Cadence, Synopsys, Mentor/Siemens)

What We're Looking For

• Candidate MUST be currently pursuing a Bachelor degree in Electronics, Computer Science or related technical field(s).
• 0-1 years of previous experience.
• Knowledge about logic gates.
• Basic silicon knowledge (diode, bipolar transistor, mos transistor, resistor).
• Basic electronics knowledge (circuits, circuit simulation, basic circuits function knowledge).
• Basic layout knowledge (routing, basic design rules for PCB and semiconductor).  
• Verilog coding is a plus.
• Good coding skills are recommended.     
• Good English (spoken and written).

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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