Minimum qualifications:

• Bachelor's degree or equivalent practical experience.
• 8 years of experience in ASIC hardware architecture and silicon design.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience designing low power ASIC hardware IP for SoCs in the following areas: Camera ISP, video codecs, display, graphics and machine learning networks.
• Experience collaborating cross-functionally with Product Management, SoC architecture, IP design and verification, camera, video, ML algorithm and software development teams.
• Experience in micro architecture, power and performance optimization.
• Experience in development of functional and performance models for architecture analysis.
• Knowledge of interconnect/fabric, security, multi-level caching architectures.

About the job:

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities:

• Define and deliver the hardware Graphics, AI, Multimedia IP integration architecture that meets power, performance, area and image quality goals.
• Collaborate with Graphics, Camera, Video, Display and ML software, system and algorithm engineers to co-develop and specify hardware IP architectures for integration into SoCs.
• Collaborate with GPU, TPU, camera ISP, video and display hardware IP design teams across global sites to drive the hardware IP architecture specifications into design implementation for SoCs.
• Collaborate with SoC and System architects on meeting power, performance and area requirements at the SoC level for multimedia use cases and experiences.
• Perform Functional/Performance modeling and detailed data analysis and trade-off evaluations to improve multimedia architecture solutions.