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Lead Design Engineer ( Layout Design )
full-timeBengaluru

Summary

Location

Bengaluru

Type

full-time

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About this role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage

  • The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
  • Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
  • The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success.
  • Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests.
  • You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Job responsibilities:

Job Description: Layout Design

Work Location :  Bangalore

Work experience : 4+ Years of experience or relevant experience

CV to [email protected]

Responsibilities:

•                 Custom layout design for DDR IO development - Understand design requirements and work closely with the design team and successfully deliver Analog layouts.

•                 Perform physical verifications like DRC/LVS/Reliability and fixing violations

•                 Lead custom layout efforts for DDR IO development - Understand design requirements and work closely with the design team and successfully deliver Analog layouts.

•                 Would be required to lead/mentor a small team of engineers towards a successful IP delivery. 

•                 Perform physical verifications like DRC/LVS/Reliability and fixing violations

Requirements

•                 Hands on layout experience in various analog IP like Opamps, Bandgaps, Dataconverters, LDO and PLL etc.

•                 Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,

•                 Knowledge of various analog layout techniques like matching, shielding etc.,

•                 Good understanding of DSM technology methodology, issues etc.,

•                 Having worked on latest technology nodes, 28nm and below, is desired.

•                 Must have good communication skills and should be team player.

•                 Scripting and automation experience is a plus.

•                 Hands on layout experience in various analog IP like High-speed Analog (Serdes), Data converters, power management and PLL etc.

•                 Understanding layout effects on the circuit such as speed, capacitance, power, and area etc.,

•                 Knowledge of various analog layout techniques, floorplan constraints and IP integration at chip level scenario.

•                 Good understanding of DSM technology methodology, issues etc.,

•                 Having worked on latest technology nodes, 28nm and below, is desired.

•                 Must have good communication skills and should be team player.

•                 Scripting and automation experience is a plus.

•                 Good communication skills, documentation, and presentation skills.

•                 Strong analytical and problem-solving skills.

Qualifications

  • Diploma/MCA/M Sc/BE/BTech/ME/MS/MTech in Electrical/Electronic or equivalent

Behavioral skills required.

  • Must possess strong written, verbal and presentation skills.
  • Ability to establish a close working relationship with both customer peers and management.
  • Explore what’s possible to get the job done, including creative use of unconventional solutions.
  • Work effectively across functions and geographies
  • Push to raise the bar while always operating with integrity.

Regards

K Madhu Prasad

[email protected]

We’re doing work that matters. Help us solve what others can’t.

Other facts

Tech stack
Layout Design,Analog Layouts,Physical Verification,Team Leadership,Communication Skills,Scripting,Automation,DSM Technology,High-Speed Analog,Data Converters,Power Management,Presentation Skills,Analytical Skills,Problem-Solving Skills,Mentoring,Collaboration

About Cadence Design Systems

Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.

Team size: 10,001+ employees
LinkedIn: Visit
Industry: Software Development

What you'll do

  • The Lead Design Engineer will be responsible for custom layout design for DDR IO development and leading a small team of engineers to ensure successful IP delivery. The role involves performing physical verifications and fixing violations.

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Frequently Asked Questions

What does a Lead Design Engineer ( Layout Design ) do at Cadence Design Systems?

As a Lead Design Engineer ( Layout Design ) at Cadence Design Systems, you will: the Lead Design Engineer will be responsible for custom layout design for DDR IO development and leading a small team of engineers to ensure successful IP delivery. The role involves performing physical verifications and fixing violations..

Why join Cadence Design Systems as a Lead Design Engineer ( Layout Design )?

Cadence Design Systems is a leading Software Development company.

Is the Lead Design Engineer ( Layout Design ) position at Cadence Design Systems remote?

The Lead Design Engineer ( Layout Design ) position at Cadence Design Systems is based in Bengaluru, India. Contact the company through Clera for specific work arrangement details.

How do I apply for the Lead Design Engineer ( Layout Design ) position at Cadence Design Systems?

You can apply for the Lead Design Engineer ( Layout Design ) position at Cadence Design Systems directly through Clera. Click the "Apply Now" button above to start your application. Clera's AI-powered platform will help match your profile with this opportunity and guide you through the application process. You can also learn more about Cadence Design Systems on their website.