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Design Engineer II: Digital Design Verification
full-timeCampinas

Summary

Location

Campinas

Type

full-time

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About this role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems Inc.  is looking for a motivated Design Engineer II: Digital Design Verification to work with us in Brazil.

As a Design Engineer II: Digital Design Verification, you will be part of the Performance Solutions Group. In this role, you will work with an experienced Cadence team and leading-edge customers to implement SoC designs in advanced process nodes. You will use Cadence’s market-leading technologies in simulation, formal proof, verification planning and regressions to help customers turn their design ideas into products that will be deployed in the marketplace.

 

Job Description:

  • Develop the entire functional verification flow on digital SoC IPs according to customer technical needs.
  • Writing, maintenance, and execution of the verification plan.
  • Full testbench creation, maintenance, and optimization (stimuli, sequences, reference model, checkers, coverage, assertions)
  • Thorough planning, analysis and reporting of code, functional and assertion coverage.
  • Work together with Architecture, RTL and FW/SW teams to guarantee full feature coverage.

 

Requirements:

  • Complete Bachelor's degree in Computer or Electrical Engineering or related areas.
  • Ability to verify digital modules autonomously in the context of subsystem/SOC using systemic metric-driven approach.
  • Expertise in building testbenches using System-Verilog, UVM, C/C++.
  • Understanding on digital logic and digital design architecture.
  • Experience in functional coverage and code coverage development and closure.
  • Experience in writing and maintaining the verification plan at module and subsystem level.
  • Debug skills in developing System Verilog and UVM-based testbenches.
  • Solid verbal and written communication skills in English and a good team player.

 

Nice to have:

  • Experience on formal verification.
  • Effective cross-team communication and documentation skills.
  • Knowledge on Cadence’s verification tools (XCelium, Simvision/Verisium Debug, VManager, JasperGold)

 

Additional Job Details:

  • Employment category: CLT.
  • Employment term: 40 hours/week.
  • Competitive benefits.
  • Hybrid work.

 

About Cadence:

Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For.

Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments.

For more information, access http://www.cadence.com

 

Be proud and passionate about the work you do. Together, our One Cadence -- One Team culture drives our success.

We’re doing work that matters. Help us solve what others can’t.

Other facts

Tech stack
Digital Design Verification,SoC Design,System-Verilog,UVM,C/C++,Digital Logic,Digital Design Architecture,Functional Coverage,Code Coverage,Verification Plan,Debug Skills,Communication Skills,Team Player,Formal Verification,Cross-Team Communication,Cadence Tools

About Cadence Design Systems

Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.

Team size: 10,001+ employees
LinkedIn: Visit
Industry: Software Development

What you'll do

  • Develop the entire functional verification flow on digital SoC IPs according to customer technical needs. Collaborate with Architecture, RTL, and FW/SW teams to ensure full feature coverage.

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Frequently Asked Questions

What does a Design Engineer II: Digital Design Verification do at Cadence Design Systems?

As a Design Engineer II: Digital Design Verification at Cadence Design Systems, you will: develop the entire functional verification flow on digital SoC IPs according to customer technical needs. Collaborate with Architecture, RTL, and FW/SW teams to ensure full feature coverage..

Why join Cadence Design Systems as a Design Engineer II: Digital Design Verification?

Cadence Design Systems is a leading Software Development company.

Is the Design Engineer II: Digital Design Verification position at Cadence Design Systems remote?

The Design Engineer II: Digital Design Verification position at Cadence Design Systems is based in Campinas, São Paulo, Brazil. Contact the company through Clera for specific work arrangement details.

How do I apply for the Design Engineer II: Digital Design Verification position at Cadence Design Systems?

You can apply for the Design Engineer II: Digital Design Verification position at Cadence Design Systems directly through Clera. Click the "Apply Now" button above to start your application. Clera's AI-powered platform will help match your profile with this opportunity and guide you through the application process. You can also learn more about Cadence Design Systems on their website.