About this role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
The Cadence IP team develops industry‑leading IP that powers products across markets—from endpoints to the edge to the cloud. Our IP is integrated into SoCs used in data centers, automobiles, cloud infrastructure, and wireless systems.
Cadence offers strong career‑growth opportunities at every stage.
We are expanding our SerDes Applications team and are looking for smart, energetic, collaborative, and creative engineers to help us lead the industry. At Cadence, we embrace diverse ideas and strive for excellence. If you want to make an impact and be challenged, join our High‑Performance Culture.
As an Applications Engineer, you will apply your expertise in high‑speed interface standards such as PCIe, CXL, Ethernet, and USB to drive technical presales efforts and win design IP business. You’ll showcase IP performance through demos at industry events while gaining both technical depth and business acumen. As part of the Technical Field Organization, you will educate customers and architect solutions using our SerDes IP portfolio. Our PHY and controller IPs ship into data center, mobile, automotive, and consumer markets. Cadence provides excellent benefits and a flexible hybrid work environment.
Responsibilities
Provide technical presales support for high‑speed IP (PCIe, CXL, Ethernet PHYs/Controllers).
Present Cadence’s IP capabilities to prospective customers.
Partner closely with Sales, Marketing, and R&D to drive opportunities to closure.
Deliver quick‑turn, product‑specific technical support to customers, architects, and designers.
Author application notes and technical articles for internal/external use.
Travel to customer sites as needed.
Qualifications
BS in EE, CE, or related field with 2+ years of relevant experience, OR
MS in EE, CE, or equivalent.Strong initiative and leadership in managing presales engagements.
Excellent presentation, verbal, and written communication skills.
Nice to Have
Experience in high‑speed interface controller and/or PHY design or verification.
Working knowledge of high‑speed PHY architectures.
Familiarity with protocols such as PCIe, CXL, UCIe, Ethernet, USB, MIPI, 112G, 56G.
Lab validation or demo setup experience.
The annual salary range for California is $74,200 to $137,800. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
Other facts
About Cadence Design Systems
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.
What you'll do
- As an Applications Engineer, you will provide technical presales support for high-speed IP and present Cadence’s IP capabilities to prospective customers. You will also partner closely with Sales, Marketing, and R&D to drive opportunities to closure.
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