SoC Physical Design Engineer, STA/Timing
full-time•Austin
About this role
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it! Join us to help deliver the next groundbreaking Apple product.
In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC using state of the art process technology.
- Work with design teams to understand and debug constraints and facilitate logic changes to improve timing. - Work with the Physical Design team, highlighting issues and best practices. - Help create timing ECO’s for project tapeout. - Create and maintain scripts and methodologies for analysis and runs. - Create documentation and help with guidelines/specs. - Deep analysis of timing paths to identify key issues. - Implement timing infrastructure.
Minimum BS and 3+ years of relevant industry experience. Experience with large design STA and/or Timing Closure. Programming skills with Perl and TCL.
Hands-on experience in STA. Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Proficient in STA and methodologies for timing closure and have a fundamental understanding of noise, crosstalk, and OCV effects, among others. Familiar with circuit modeling, including SPICE models, and worst-case corner selection. Familiar with ECO techniques and implementation. Good communicator who can accurately describe issues and follow them through to completion.
Description
- Work with design teams to understand and debug constraints and facilitate logic changes to improve timing. - Work with the Physical Design team, highlighting issues and best practices. - Help create timing ECO’s for project tapeout. - Create and maintain scripts and methodologies for analysis and runs. - Create documentation and help with guidelines/specs. - Deep analysis of timing paths to identify key issues. - Implement timing infrastructure.
Minimum Qualifications
Minimum BS and 3+ years of relevant industry experience. Experience with large design STA and/or Timing Closure. Programming skills with Perl and TCL.
Preferred Qualifications
Hands-on experience in STA. Familiar with important aspects of timing of large high-performance SoC designs in sub-micron technologies. Proficient in STA and methodologies for timing closure and have a fundamental understanding of noise, crosstalk, and OCV effects, among others. Familiar with circuit modeling, including SPICE models, and worst-case corner selection. Familiar with ECO techniques and implementation. Good communicator who can accurately describe issues and follow them through to completion.
Other facts
Tech stack
STA,Timing Closure,Perl,TCL,ECO Techniques,Circuit Modeling,SPICE Models,Noise,Crosstalk,OCV Effects,Documentation,Timing Analysis,Physical Design,Methodologies,Design Constraints,Logic Changes
About Apple
We’re a diverse collective of thinkers and doers, continually reimagining what’s possible to help us all do what we love in new ways. And the same innovation that goes into our products also applies to our practices — strengthening our commitment to leave the world better than we found it. This is where your work can make a difference in people’s lives. Including your own.
Apple is an equal opportunity employer that is committed to inclusion and diversity. Visit apple.com/careers to learn more.
Team size: 10,001+ employees
Website: http://www.apple.com/careers
LinkedIn: Visit
Industry: Computers and Electronics Manufacturing
Founding Year: 1976
What you'll do
- You will be responsible for the physical implementation of design partitions for a complex SoC. This includes working with design teams to debug constraints, creating timing ECOs, and maintaining scripts for analysis.
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Frequently Asked Questions
What does a SoC Physical Design Engineer, STA/Timing do at Apple?
As a SoC Physical Design Engineer, STA/Timing at Apple, you will: you will be responsible for the physical implementation of design partitions for a complex SoC. This includes working with design teams to debug constraints, creating timing ECOs, and maintaining scripts for analysis..
Why join Apple as a SoC Physical Design Engineer, STA/Timing?
Apple is a leading Computers and Electronics Manufacturing company.
Is the SoC Physical Design Engineer, STA/Timing position at Apple remote?
The SoC Physical Design Engineer, STA/Timing position at Apple is based in Austin, Texas, United States. Contact the company through Clera for specific work arrangement details.
How do I apply for the SoC Physical Design Engineer, STA/Timing position at Apple?
You can apply for the SoC Physical Design Engineer, STA/Timing position at Apple directly through Clera. Click the "Apply Now" button above to start your application. Clera's AI-powered platform will help match your profile with this opportunity and guide you through the application process. You can also learn more about Apple on their website.