Job Description:

In order to support the business division “Airbus Optical Instruments”, Airbus Defence and Space is looking for a

Master's Thesis Student – Digital Control-Loop Development for Space Applications (d/f/m)

We are looking for a motivated and ambitious student (d/f/m) to join us for a master thesis in the area of Field Programmable Gate Array (FPGA)-based  digital control systems. The focus of this work is the further development of an existing implementation of a control loop on an FPGA, extending it with adaptive strategies that enable different control behaviors depending on operational conditions. A second core task is the design of an interface between the FPGA and real-world applications, complemented by the implementation of a graphical user interface (GUI) for system monitoring.

You will become part of a dynamic team of engineers and scientists working on pre-development activities for future space applications, contributing to the advancement of next-generation precision optical instruments. We offer a stimulating research and development environment with state-of-the-art software and hardware. You will gain hands-on experience in pioneering developments with direct relevance to scientific space missions, shaping the future of optical space technology.

• Location: Friedrichshafen
• Start: 01.02.2026
• Duration: 6 months

Your location

At the Airbus site in Friedrichshafen you will be working on innovation where others spend their holidays. Enjoy panoramic views of Lake Constance while having lunch in our canteen. And after work, join one of our many corporate sports groups to go running, sailing or skiing.

Your benefits

• Attractive salary and work-life balance with an 35-hour week (flexitime).
• International environment with the opportunity to network globally.
• Work with modern/diversified technologies.
• At Airbus, we see you as a valuable team member and you are not hired to brew coffee, instead you are in close contact with the interfaces and are part of our weekly team meetings.
• Opportunity to participate in the Generation Airbus Community to expand your own network.

Your tasks and responsibilities

• Implement VHDL and C code within the Xilinx FPGA/VIVADO environment.
• Further develop and optimize the existing FPGA-based control system, including the implementation of adaptive control strategies for different operational conditions and the design of suitable interface electronics (analogue and digital).
• Perform data analysis, simulations, and performance evaluations of the closed-loop system.
• Set up a graphical user interface (GUI) to visualize and monitor the system’s real-time performance.
• Document development steps and results in a structured and reproducible manner.

Desired skills and qualifications

• Enrollment in a Master’s program (or equivalent) in Electrical Engineering, Communications Engineering, Computer Science, Physics, or a related field.
• Solid background in digital signal processing and/or control theory.
• Proven practical experience in FPGA development with VHDL/Verilog (preferably using Xilinx/VIVADO).
• Programming skills in C/C++, MATLAB, Python or similar environments.
• Strong analytical and problem-solving abilities, combined with creativity for innovative solutions.
• Ability to work both independently and collaboratively in a team-oriented environment.
• Good communication skills, written and spoken, in English (German is a plus).

Please upload the following documents: cover letter, CV, relevant transcripts, enrollment certificate. 

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